Hallo
I have problem with access to ADC registers in xF28M35H52C1RFPT (witch prefix X). Core C28 is clocked with 150MHz and analog system clock is set to 37.5 MHz (CCLKCTL.CLKDIV = 3 >> divide by /4). Accessing to ADC results register is performed in ISR (located in RAML0). I have problems with time of executing following tasks
1) accessing to Adc1Regs.ADCINTFLGCLR and reset interrupt flag
2) moving data from ADC RESULT register to variable register
If code is executed step by step on the assembler level , time of executing is coherent with theoretical time (sum of instruction time). If code is run the time of executing is much longer.
Below sample of code (C and asm)
1) accessing to Adc1Regs.ADCINTFLGCLR and reset interrupt flag ; Executing STEP BY STEP : 2 cycles; normal run : about 38 cycles !!!!!!!!
Adc1Regs.ADCINTFLGCLR.bit.ADCINT2 = 1; //Clear ADCINT1 flag
MOVW DP, #0x1c4
OR @0x5, #0x0002
2) moving data from ADC RESULT register to variable register; Executing STEP BY STEP : 4 cycles; normal run : about 36 cycles !!!!!!!!!
Uo2_adc = Adc1Result.ADCRESULT3 ;//-2048+CONST_OFFSET;
MOVW DP, #0x2c
MOV AL, @0x3
MOVW DP, #0x285
MOV @0xa, AL
Real time of executing was found through latching ePWM counters.
Any ideas why those times so dramaticly extend. It is normal or I make mistake in servicing ADC. In my application time of executing this ISR is critical
Thanks for suggestions.
Pawel
