C2000 launchpad UART

gripas11

Other Parts Discussed in Thread: TMS320F28027

Hi,

I'm using C2000 launchpad board (with tms320f28027 mcu).

I used (C:\tidcs\c28\DSP2802x\v121\DSP2802x_examples_ccsv4\scia_loopback_interrupts) example. But I don't understand why, when I change length of the message, I don't receive data correctly. Example is with two 8 bit characters, if I prolong the message to 3 members then it still receives correctly, but if it's 4 or more characters, then data is not received correctly.

The whole example is implemented in loopback mode, so the line latency is minimal. I think this has something to do with send and receive interrupt overlap.

If someone could help me about this I would appreciate it a lot.

Regards

over 12 years ago

0 gripas11 over 12 years ago

Intellectual 425 points

Any thoughts?

0 Gautam Iyer over 12 years ago in reply to gripas11

Guru 192875 points

Hi,

Are you using the concept of arrays for string implementation?

Regards,

Gautam

0 gripas11 over 12 years ago in reply to Gautam Iyer

Intellectual 425 points

Hello,

I'm not sure if I understand you correct in means of "using the concept of arrays for string implementation", but i think that answer is yes. I'll show you some code fragments:

#define length1 4 // lenght1 is a variable that denotes length of data to send and receive. This is the only thing I

Fullscreen 6406.Example_2802xSci_FFDLB_int.c Download

// TI File $Revision: /main/2 $
// Checkin $Date: August 3, 2009   10:29:24 $
//###########################################################################
//
// FILE:   Example_2802xSci_FFDLB_int.c
//
// TITLE:  DSP2802x Device SCI Digital Loop Back porgram.
//
//
// ASSUMPTIONS:
//
//    This program requires the DSP2802x header files.
//
//    This program uses the internal loop back test mode of the peripheral.
//    Other then boot mode pin configuration, no other hardware configuration
//    is required.
//
//    As supplied, this project is configured for "boot to SARAM"
//    operation.  The 2802x Boot Mode table is shown below.
//    For information on configuring the boot mode of an eZdsp,
//    please refer to the documentation included with the eZdsp,
//
//    $Boot_Table
//    While an emulator is connected to your device, the TRSTn pin = 1,
//    which sets the device into EMU_BOOT boot mode. In this mode, the
//    peripheral boot modes are as follows:
//
//      Boot Mode:   EMU_KEY        EMU_BMODE
//                   (0xD00)	     (0xD01)
//      ---------------------------------------
//      Wait		 !=0x55AA        X
//      I/O		     0x55AA	         0x0000
//      SCI		     0x55AA	         0x0001
//      Wait 	     0x55AA	         0x0002
//      Get_Mode	 0x55AA	         0x0003
//      SPI		     0x55AA	         0x0004
//      I2C		     0x55AA	         0x0005
//      OTP		     0x55AA	         0x0006
//      Wait		 0x55AA	         0x0007
//      Wait		 0x55AA	         0x0008
//      SARAM		 0x55AA	         0x000A	  <-- "Boot to SARAM"
//      Flash		 0x55AA	         0x000B
//	    Wait		 0x55AA          Other
//
//   Write EMU_KEY to 0xD00 and EMU_BMODE to 0xD01 via the debugger
//   according to the Boot Mode Table above. Build/Load project,
//   Reset the device, and Run example
//
//   $End_Boot_Table
//
//   Assumes the device has both SCI-A and SCI-B peripherals.
//
// DESCRIPTION:
//
//    This program is a SCI example that uses the internal loopback of
//    the peripheral.  Both interrupts and the SCI FIFOs are used.
//
//    A stream of data is sent and then compared to the recieved stream.
//
//    The SCI-A sent data looks like this:
//    00 01
//    01 02
//    02 03
//    ....
//    FE FF
//    FF 00
//    etc..
//
//
//
//    The pattern is repeated forever.
//
//    Watch Variables:
//       sdataA             Data being sent
//       rdataA             Data received
//       rdata_pointA       Keep track of where we are in the datastream
//                         This is used to check the incoming data
//###########################################################################
// Original Source by S.D.
//
// $TI Release: 2802x C/C++ Header Files and Peripheral Examples V1.21 $
// $Release Date: October 24, 2009 $
//###########################################################################

#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File

#define CPU_FREQ 	60E6        // Default = 40 MHz. Change to 60E6 for 60 MHz devices
#define LSPCLK_FREQ CPU_FREQ/4
#define SCI_FREQ 	100E3
#define SCI_PRD 	(LSPCLK_FREQ/(SCI_FREQ*8))-1

// Prototype statements for functions found within this file.
interrupt void sciaTxFifoIsr(void);
interrupt void sciaRxFifoIsr(void);
interrupt void scibTxFifoIsr(void);
interrupt void scibRxFifoIsr(void);
void scia_fifo_init(void);
void scib_fifo_init(void);
void error(void);

#define length1 4
// Global variables
Uint16 sdataA[length1];    // Send data for SCI-A
Uint16 rdataA[length1];    // Received data for SCI-A
Uint16 rdata_pointA; // Used for checking the received data

void main(void)
{
   Uint16 i;

// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2802x_SysCtrl.c file.
   InitSysCtrl();

// Step 2. Initalize GPIO:
// This example function is found in the DSP2802x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio();
// Setup only the GP I/O only for SCI-A and SCI-B functionality
// This function is found in DSP2802x_Sci.c
   InitSciGpio();

// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
   DINT;

// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2802x_PieCtrl.c file.
   InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
   IER = 0x0000;
   IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in DSP2802x_DefaultIsr.c.
// This function is found in DSP2802x_PieVect.c.
   InitPieVectTable();

// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
   EALLOW;	// This is needed to write to EALLOW protected registers
   PieVectTable.SCIRXINTA = &sciaRxFifoIsr;
   PieVectTable.SCITXINTA = &sciaTxFifoIsr;
   EDIS;   // This is needed to disable write to EALLOW protected registers

// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2802x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
   scia_fifo_init();  // Init SCI-A

// Step 5. User specific code, enable interrupts:

// Init send data.  After each transmission this data
// will be updated for the next transmission
   for(i = 0; i<length1; i++)
   {
      sdataA[i] = i;
   }

   rdata_pointA = sdataA[0];
// Enable interrupts required for this example
   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
   PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9, INT1
   PieCtrlRegs.PIEIER9.bit.INTx2=1;     // PIE Group 9, INT2
   IER = 0x100;	// Enable CPU INT
   EINT;

// Step 6. IDLE loop. Just sit and loop forever (optional):
	for(;;);

}

void error(void)
{
    asm("     ESTOP0"); // Test failed!! Stop!
    for (;;);
}

interrupt void sciaTxFifoIsr(void)
{
    Uint16 i,a;
    for(i=0; i< length1; i++)
    {
 	   SciaRegs.SCITXBUF=sdataA[i];     // Send data
 	   for(a=0;a<255;a++);
	}

    for(i=0; i< length1; i++)                 //Increment send data for next cycle
    {
 	   sdataA[i] = (sdataA[i]+1) & 0x00FF;
	}

	SciaRegs.SCIFFTX.bit.TXFFINTCLR=1;	// Clear SCI Interrupt flag
	PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK
}

interrupt void sciaRxFifoIsr(void)
{
    Uint16 i;
	for(i=0;i<length1;i++)
	{
	   rdataA[i]=SciaRegs.SCIRXBUF.all;	 // Read data
	}
	for(i=0;i<length1;i++)                     // Check received data
	{
	   if(rdataA[i] != ( (rdata_pointA+i) & 0x00FF) );// error();
	}
	rdata_pointA = (rdata_pointA+1) & 0x00FF;

	SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag
	SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag

	PieCtrlRegs.PIEACK.all|=0x100;       // Issue PIE ack
}

void scia_fifo_init()
{
   SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback
                                  // No parity,8 char bits,
                                  // async mode, idle-line protocol
   SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK,
                                  // Disable RX ERR, SLEEP, TXWAKE
   SciaRegs.SCICTL2.bit.TXINTENA =1;
   SciaRegs.SCICTL2.bit.RXBKINTENA =1;
   SciaRegs.SCIHBAUD = 0x0003;
//   SciaRegs.SCILBAUD = SCI_PRD;
   SciaRegs.SCILBAUD = 0x0c;
   SciaRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back
   SciaRegs.SCIFFTX.all=0xC022;
   SciaRegs.SCIFFRX.all=0x0022;
   SciaRegs.SCIFFCT.all=0x00;

   SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
   SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
   SciaRegs.SCIFFRX.bit.RXFIFORESET=1;

}

//===========================================================================
// No more.
//===========================================================================

//changed about code, to change message length. (I also tried changing baud rate, some changes appeared but

//nothing useful).

// Global variables
Uint16 sdataA[length1]; // Send data for SCI-A
Uint16 rdataA[length1]; // Received data for SCI-A

//these are interrupts that perform receive and send of message

interrupt void sciaTxFifoIsr(void)
{
    Uint16 i,a;
    for(i=0; i< length1; i++)
    {
        SciaRegs.SCITXBUF=sdataA[i];     // Send data
        for(a=0;a<255;a++);
   }

    for(i=0; i< length1; i++)                 //Increment send data for next cycle
    {
        sdataA[i] = (sdataA[i]+1) & 0x00FF;
   }

   SciaRegs.SCIFFTX.bit.TXFFINTCLR=1;   // Clear SCI Interrupt flag
   PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK
}

interrupt void sciaRxFifoIsr(void)
{
    Uint16 i;
   for(i=0;i<length1;i++)
   {
       rdataA[i]=SciaRegs.SCIRXBUF.all;   // Read data
   }
   for(i=0;i<length1;i++)                     // Check received data
   {
       if(rdataA[i] != ( (rdata_pointA+i) & 0x00FF) );// error();
   }
   rdata_pointA = (rdata_pointA+1) & 0x00FF;

   SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag
   SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag

   PieCtrlRegs.PIEACK.all|=0x100;       // Issue PIE ack
}

I also hooked up the file, with my changes. So maybe you could suggest how to make as long data transmission as possible (let's say 100 byte or something similar).

Regards Gautam.

0 Maria Todorova over 12 years ago in reply to gripas11

Guru 13185 points

Hello,

Based on datasheet for SCIFFTX and SCIFFRX:

"Transmit FIFO will generate interrupt when the FIFO status bits (TXFFST4−0) and FIFO level bits (TXFFIL4−0 ) match (less than or equal to)."

" Receive FIFO generates interrupt when the FIFO status bits (RXFFST4−0) and FIFO level bits
(RXFFIL4−0) match (i.e., are greater than or equal to)."

In this example, i think it used:

SciaRegs.SCIFFTX.all=0xC022;
SciaRegs.SCIFFRX.all=0x0022;

So in this case, transmit and receive interrupt will occur every 2 words. So event if you change the length of data receiver and data transmitter as 4 in the interrupt, it will only do for 0 and 1 data array (not until 2 and 3) based on this code.

For transmitting bigger data, try to arrange data array in transmit interrupt to increment every 2 times or 4 times (if you change the TXFFIL and RXFFIL into 4).

And also arrange the receiving array.

Good luck!

Best regards,

Maria

0 gripas11 over 12 years ago in reply to Maria Todorova

Intellectual 425 points

Hello Maria,

Thank you for good answer, it helped me a lot.

1Q.: If I'm not wrong it is only possible to transfer maximum 4 words in single message (FIFO length 4 words maximum). And somehow (I changed SciaRegs.SCIFFTX.all=0xC024; SciaRegs.SCIFFRX.all=0x0024; register values to bigger size) I receive scattered values (for example: 151, 171, 192, 214). Send buffer is alright. I also tried changing (SciaRegs.SCIFFCT.all=0x00;) register value to impose additional latency, but nothing changes. Maybe you could suggest a solution for this issue?

2Q.: Second question, example operates with 0 to 0xFF values, whereas it is possible to send 0xFFFF values, so in this case I tried changing send buffer (which was OK), but receive values were still 0 to 0xFF.

Any ideas appreciated!!

Regards,
Vytautas

0 Maria Todorova over 12 years ago in reply to gripas11

Guru 13185 points

Hello Vytautas,

Can you give us the snip code so we can check it?

Best regards,

Maria

0 Gautam Iyer over 12 years ago in reply to gripas11

Guru 192875 points

Hi,

2Q.: Second question, example operates with 0 to 0xFF values, whereas it is possible to send 0xFFFF values, so in this case I tried changing send buffer (which was OK), but receive values were still 0 to 0xFF.

I hope you've set RXFFST4−0 to 00100 (Receive FIFO has 4 words, the maximum allowed.)

If this is set, then should be no issue in receiving 4words unless the Rx interrupt is malfunctioning.

Regards,

Gautam

0 gripas11 over 12 years ago in reply to Gautam Iyer

Intellectual 425 points

Hello everyone,

I'm glad that there is so much of attention, but let's get back to the answer.

This is my code (it has very few changes compared to original example, no changes in main(), few changes in transfer, receive and configuration functions. The idea is to send as long message as possible.):

#include "DSP28x_Project.h" // Device Headerfile and Examples Include File

#define CPU_FREQ 60E6 // Default = 40 MHz. Change to 60E6 for 60 MHz devices
#define LSPCLK_FREQ CPU_FREQ/4
#define SCI_FREQ 100E3
#define SCI_PRD (LSPCLK_FREQ/(SCI_FREQ*8))-1

// Prototype statements for functions found within this file.
interrupt void sciaTxFifoIsr(void);
interrupt void sciaRxFifoIsr(void);
interrupt void scibTxFifoIsr(void);
interrupt void scibRxFifoIsr(void);
void scia_fifo_init(void);
void scib_fifo_init(void);
void error(void);

#define length1 4
// Global variables
Uint16 sdataA[length1]; // Send data for SCI-A
Uint16 rdataA[length1]; // Received data for SCI-A
Uint16 rdata_pointA; // Used for checking the received data

void main(void)
{
Uint16 i;

// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2802x_SysCtrl.c file.
InitSysCtrl();

// Step 2. Initalize GPIO:
// This example function is found in the DSP2802x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio();
// Setup only the GP I/O only for SCI-A and SCI-B functionality
// This function is found in DSP2802x_Sci.c
InitSciGpio();

// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;

// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2802x_PieCtrl.c file.
InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2802x_DefaultIsr.c.
// This function is found in DSP2802x_PieVect.c.
InitPieVectTable();

// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.SCIRXINTA = &sciaRxFifoIsr;
PieVectTable.SCITXINTA = &sciaTxFifoIsr;
EDIS; // This is needed to disable write to EALLOW protected registers

// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2802x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
scia_fifo_init(); // Init SCI-A

// Step 5. User specific code, enable interrupts:

// Init send data. After each transmission this data
// will be updated for the next transmission
for(i = 0; i<length1; i++)
{
sdataA[i] = i;
}

rdata_pointA = sdataA[0];
// Enable interrupts required for this example
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER9.bit.INTx1=1; // PIE Group 9, INT1
PieCtrlRegs.PIEIER9.bit.INTx2=1; // PIE Group 9, INT2
IER = 0x100; // Enable CPU INT
EINT;

// Step 6. IDLE loop. Just sit and loop forever (optional):
for(;;);

}

void error(void)
{
asm(" ESTOP0"); // Test failed!! Stop!
for (;;);
}

interrupt void sciaTxFifoIsr(void)
{
Uint16 i;
for(i=0; i< length1; i++)
{
SciaRegs.SCITXBUF=sdataA[i]; // Send data
}

for(i=0; i< length1; i++) //Increment send data for next cycle
{
sdataA[i] = (sdataA[i]+1) & 0xFFFF; // CHANGE FROM 0xFF
}

SciaRegs.SCIFFTX.bit.TXFFINTCLR=1; // Clear SCI Interrupt flag
PieCtrlRegs.PIEACK.all|=0x100; // Issue PIE ACK
}

interrupt void sciaRxFifoIsr(void)
{
Uint16 i;
for(i=0;i<length1;i++)
{
rdataA[i]=SciaRegs.SCIRXBUF.all; // Read data
}
for(i=0;i<length1;i++) // Check received data
{
if(rdataA[i] != ( (rdata_pointA+i) & 0xFFFF) );// error(); // commented to avoid error and stop of code // CHANGE FROM 0xFF
}
rdata_pointA = (rdata_pointA+1) & 0xFFFF; // CHANGE FROM 0xFF

SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1; // Clear Overflow flag
SciaRegs.SCIFFRX.bit.RXFFINTCLR=1; // Clear Interrupt flag

PieCtrlRegs.PIEACK.all|=0x100; // Issue PIE ack
}

void scia_fifo_init()
{
SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
// No parity,8 char bits,
// async mode, idle-line protocol
SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
SciaRegs.SCICTL2.bit.TXINTENA =1;
SciaRegs.SCICTL2.bit.RXBKINTENA =1;
SciaRegs.SCIHBAUD = 0x00;
// SciaRegs.SCILBAUD = SCI_PRD;
SciaRegs.SCILBAUD = 0xC2; // 2400 -0x30C; 4800 -0x186; 9600 -0xC2; 19200 -0x97; 38400 -0x48
SciaRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back
SciaRegs.SCIFFTX.all=0xC030;
SciaRegs.SCIFFRX.all=0x0030;
SciaRegs.SCIFFCT.all=0x00; //Delay register

SciaRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset
SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
SciaRegs.SCIFFRX.bit.RXFIFORESET=1;

}

If I understand correctly, here is main problem of configuration. So I'll try solving it as well :)

Regards, and thanks for your care.

0 Maria Todorova over 12 years ago in reply to gripas11

Guru 13185 points

Hello,

If I am not wrong, for first transmit, this code sends and receives 0-3,

and then the second transmit, it sends and receives 1-4

and the third, it sends and receives 2-5.... and so on until 0xFFFF.

Did you get this result? Did you wait until it reached 0xFFFF?

And in this code, SCIFFTX and SCIFFRX are still not fixed.

SciaRegs.SCIFFTX.all=0xC030;
SciaRegs.SCIFFRX.all=0x0030;

What exactly the result that you got from this code?

Best regards,

Maria

0 gripas11 over 12 years ago in reply to Maria Todorova

Intellectual 425 points

Hello,

As I mentioned somewhere in my response : THE AIM IS TO GET AS LONG MESSAGE TO TRANSMIT AS POSSIBLE. Because every average example tells you how to send 2 bytes, when I try changing this to 4, everything goes to waste...

When I take default example everything works, but when I try sending more than 255 as an information value (for example 65535), or more than two bytes at once, in receiver side I start getting random data which is not aligned (some values are skipped and never more than 255, so I see only last byte of any message, they go in increasing order, but doesn't go one after another).

If I set a breakpoint in the end of TX interrupt all buffer has new values, where (a, a+1, a+2, a+3) and then first value is discarded and last one is filled with a+4 and so on. Values of TX are being renewed, but receive values- not.
When I get a breakpoint at the end of RX interrupt values are changing in leaps (i think it means that RX interrupt is not being issued every TX interrupt), for example :

TX buffer: 8221,8222,8223,8224 RX buffer: 45,103,159,216
Run until next RX interrupt
TX buffer: 8449,8450,8451,8452 RX buffer: 17,73,131,190

And about registers I don't fully understand how they work. Reference guide sprugh1c.pdf says for register TXFFIL4-0: 00000 bits are default value, maximum are equal to 4 , so why are there bit4 and bit5 which are not used at all..
SciaRegs.SCIFFTX.all=0xC424;
SciaRegs.SCIFFRX.all=0x0424;

Results where obtained, with these register parameters.

Regards

0 Maria Todorova over 12 years ago in reply to gripas11

Guru 13185 points

Hello,

I am not sure I can help more, but I am wondering.

Can you try this code below?

Fullscreen 2234.Example_2802xSci_FFDLB_int-2.c Download

// TI File $Revision: /main/2 $
// Checkin $Date: August 3, 2009   10:29:24 $
//###########################################################################
//
// FILE:   Example_2802xSci_FFDLB_int.c
//
// TITLE:  DSP2802x Device SCI Digital Loop Back porgram.
//
//
// ASSUMPTIONS:
//
//    This program requires the DSP2802x header files.
//
//    This program uses the internal loop back test mode of the peripheral.
//    Other then boot mode pin configuration, no other hardware configuration
//    is required.
//
//    As supplied, this project is configured for "boot to SARAM"
//    operation.  The 2802x Boot Mode table is shown below.
//    For information on configuring the boot mode of an eZdsp,
//    please refer to the documentation included with the eZdsp,
//
//    $Boot_Table
//    While an emulator is connected to your device, the TRSTn pin = 1,
//    which sets the device into EMU_BOOT boot mode. In this mode, the
//    peripheral boot modes are as follows:
//
//      Boot Mode:   EMU_KEY        EMU_BMODE
//                   (0xD00)	     (0xD01)
//      ---------------------------------------
//      Wait		 !=0x55AA        X
//      I/O		     0x55AA	         0x0000
//      SCI		     0x55AA	         0x0001
//      Wait 	     0x55AA	         0x0002
//      Get_Mode	 0x55AA	         0x0003
//      SPI		     0x55AA	         0x0004
//      I2C		     0x55AA	         0x0005
//      OTP		     0x55AA	         0x0006
//      Wait		 0x55AA	         0x0007
//      Wait		 0x55AA	         0x0008
//      SARAM		 0x55AA	         0x000A	  <-- "Boot to SARAM"
//      Flash		 0x55AA	         0x000B
//	    Wait		 0x55AA          Other
//
//   Write EMU_KEY to 0xD00 and EMU_BMODE to 0xD01 via the debugger
//   according to the Boot Mode Table above. Build/Load project,
//   Reset the device, and Run example
//
//   $End_Boot_Table
//
//   Assumes the device has both SCI-A and SCI-B peripherals.
//
// DESCRIPTION:
//
//    This program is a SCI example that uses the internal loopback of
//    the peripheral.  Both interrupts and the SCI FIFOs are used.
//
//    A stream of data is sent and then compared to the recieved stream.
//
//    The SCI-A sent data looks like this:
//    00 01
//    01 02
//    02 03
//    ....
//    FE FF
//    FF 00
//    etc..
//
//
//
//    The pattern is repeated forever.
//
//    Watch Variables:
//       sdataA             Data being sent
//       rdataA             Data received
//       rdata_pointA       Keep track of where we are in the datastream
//                         This is used to check the incoming data
//###########################################################################
// Original Source by S.D.
//
// $TI Release: 2802x C/C++ Header Files and Peripheral Examples V1.21 $
// $Release Date: October 24, 2009 $
//###########################################################################

#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File


// Prototype statements for functions found within this file.
interrupt void sciaTxFifoIsr(void);
interrupt void sciaRxFifoIsr(void);
//interrupt void scibTxFifoIsr(void);
//interrupt void scibRxFifoIsr(void);
void scia_fifo_init(void);
//void scib_fifo_init(void);
//void error(void);

// Global variables
Uint16 sdataA[4];    // Send data for SCI-A
Uint16 rdataA[4];    // Received data for SCI-A
//Uint16 rdata_pointA; // Used for checking the received data

unsigned int txcounter = 0;
unsigned int rxcounter = 0;

void main(void)
{
   Uint16 i;

// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2806x_SysCtrl.c file.
   InitSysCtrl();

// Step 2. Initalize GPIO:
// This example function is found in the F2806x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio();
// Setup only the GP I/O only for SCI-A and SCI-B functionality
// This function is found in F2806x_Sci.c
   InitSciGpio();

// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
   DINT;

// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2806x_PieCtrl.c file.
   InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
   IER = 0x0000;
   IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in F2806x_DefaultIsr.c.
// This function is found in F2806x_PieVect.c.
   InitPieVectTable();

// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
   EALLOW;  // This is needed to write to EALLOW protected registers
   PieVectTable.SCIRXINTA = &sciaRxFifoIsr;
   PieVectTable.SCITXINTA = &sciaTxFifoIsr;
   EDIS;   // This is needed to disable write to EALLOW protected registers

// Step 4. Initialize all the Device Peripherals:
// This function is found in F2806x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
   scia_fifo_init();  // Init SCI-A

// Step 5. User specific code, enable interrupts:

// Init send data.  After each transmission this data
// will be updated for the next transmission
  /* for(i = 0; i<4; i++)
   {
      sdataA[i] = i;
   }
   */
   sdataA[0] = 0x2211;
   sdataA[1] = 0x4433;
   sdataA[2] = 0x6655;
   sdataA[3] = 0x8877;
   

 //  rdata_pointA = sdataA[0];
// Enable interrupts required for this example
   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
   PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9, INT1
   PieCtrlRegs.PIEIER9.bit.INTx2=1;     // PIE Group 9, INT2
   IER = 0x100; // Enable CPU INT
   EINT;

// Step 6. IDLE loop. Just sit and loop forever (optional):
    for(;;);

}

void error(void)
{
   __asm("     ESTOP0"); // Test failed!! Stop!
    for (;;);
}

__interrupt void sciaTxFifoIsr(void)
{
    Uint16 i;
	
	txcounter ++;
	
    for(i=0; i< 4; i++)
    {
       SciaRegs.SCITXBUF = sdataA[i];     // Send data
    }

    SciaRegs.SCIFFTX.bit.TXFFINTCLR = 1;  // Clear SCI Interrupt flag
    PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK
}

__interrupt void sciaRxFifoIsr(void)
{
    Uint16 i;
	
	rxcounter ++;
	
    for(i=0;i<4;i++)
    {
       rdataA[i]=SciaRegs.SCIRXBUF.all;  // Read data
    }
 

    SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag
    SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag

    PieCtrlRegs.PIEACK.all|=0x100;       // Issue PIE ack
}

void scia_fifo_init()
{
   SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback
                                  // No parity,8 char bits,
                                  // async mode, idle-line protocol
   SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK,
                                  // Disable RX ERR, SLEEP, TXWAKE
   SciaRegs.SCICTL2.bit.TXINTENA =1;
   SciaRegs.SCICTL2.bit.RXBKINTENA =1;
   //SciaRegs.SCIHBAUD = 0x0000;
   //SciaRegs.SCILBAUD = SCI_PRD;
   SciaRegs.SCIHBAUD    =0x0000;  // 9600 baud
   SciaRegs.SCILBAUD    =0x00C2;
   SciaRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back
   SciaRegs.SCIFFTX.all=0xC024;
   SciaRegs.SCIFFRX.all=0x0024;
   SciaRegs.SCIFFCT.all=0x00;

   SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
   SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
   SciaRegs.SCIFFRX.bit.RXFIFORESET=1;

}

//===========================================================================
// No more.
//===========================================================================

Can you debug the data of rdataA[0] until rdataA[3]? What are the results?

And can you debug txcounter and rxcounter? What are the results?

Best regards,

Maria

0 gripas11 over 12 years ago in reply to Maria Todorova

Intellectual 425 points

Hello once again,

I tried out your code and it gives similar results to previous.

rxcounter =1; txcounter=480;

In rdata=0x0011, 0x0055, 0x0011, 0x0033, this changes, but not in ascending order (randomly).

So thank you for help, I'll try to figure something out.

Regards

0 Maria Todorova over 12 years ago in reply to gripas11

Guru 13185 points

OK.

Btw, have you tried SCI without FIFO?

Best regards,

Maria

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