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GPIODATA Register Memory Mapping

Dear All,

            I am using F28M36y Evalvation board and CCS5.4. When i try the example of LED  for M3 Core i can see the LED state physically  and in the GPIODATA Reg under Register varibles . But when i try to look at the Memory Location where the data is changing i am not seeing it on a particular port address(Port F 0x40025000) with Offset of 0x00 for GPIODATA . But i am able to see the Change at 0x400253FC. Where as with other reg like GPIODIR the Memory address are correctly mapped according to reference Manual.

         Can somebody tell me how the address is mapped for GPIODATA reg.

 

Regards,

Suresh Jaggal.