TMS320F2806x HRPWM 'DAC' Resolution

Hi Johnw,

My question is what is the best bit equivalent resolution you can get out of the HRPWM module for the x2806x parts?

Can you elaborate on: what do you mean by "best bit equivalent resolution"?

Regards,

Gautam

Hello Gautam,

What is the largest number of bits that can be represented doing HPWPM?

Is it 24-bits?
Is it 18.1 bits?

The performance of a DAC is what this is compared to.  Common values are 12-bit, 16-bit, 24-bit, and even 32-bit.

I am looking for the maximum number of bits the 2806x family can do.  

I hope this makes is clearer.

Thanks,
John 

John, I don't believe that F2806x would be able to deliver more than 18.1 bits resolution. Even the doc does not mention anything above that.

Regards,

Gautam

The HRPWM adds about 6 bits of resolution to the ePWM.  The ePWM period register is 16-bits, so you could theoretically get about 22-bits of resolution.  This would be at a speed of around 1.5Hz, so you would need an appropriate lowpass filter.

Note that increased resolution does NOT imply increased accuracy. e.g. if your lowpass filter has a 1% amplitude error, your DAC will never be more accurate than 1% (about 6.6 bits).

Hello Devin,

Thanks for the answer.

Maybe you can do just as good using a timer isr:

PWM resolution (bits) = Log2 (Tpwm/Tsysclkout)

24 = Log2 (Tpwm/1/90E6)

((Log2^)-1 (24)) * (1/90E6) = Tpwm

16777216 => 186.4 mS -> 5.36 Hz

===

Could that be an effective 24-bit DAC?

Also - if you don't mind - how do you do the DAC bit resolution calculation for the HRPWM?  I looked through the docs - there are some examples of 14 bits and I think 12.7 bits but I didn't see the calculation that it was derived from.

Thanks!
John 

Thanks Devin for that explanation.

Regards,

Gautam

Hello Again Devin,

An appropriate low-pass filter would be at least 3-poles - correct?

Thanks Again,
John W. 

John,

If you look at this table in the TRM you can see that the HRPWM adds 6-bits for every example.  

I just carried it to the extreme of using the maximum ePWM period of 2^16 counts. 

I think you are correct with the number of ~5Hz.  I also should correct my previous number of ~1.5Hz, it should be ~1.5KHz.  

Check out this application note if you haven't already (should also somewhat apply to using the CPU timer as a DAC): spraa88a

I am definitely not an expert on filter design, but I suspect that your performance requirements and cost/power/board space requirements are going to determine the topology and order of filter than you want; can I ask exactly what you are trying to accomplish with the DAC?

Hello Devin,

Yes - I have seen that table - but that really isn't an equation other than adding 6 to the regular PWM resolution - maybe that is the equation.  

Yes - I have reviewed spraa8a.

For this task I am trying to 'tune' the frequency of an OCXO.  It can be shown to do that correctly you need at least 24 bits of resolution.

I have been thinking about doing 2 16-bit DACs going through a summer - using the appropriate resistors to weight the DAC outputs.   Which choice is less noisy?  That is the concern.  The EFC (electronic frequency control) for OCXO's is very noise sensitive.  Let's say you have a 3V range - then that last bit is something like 178.8 nV - pretty sensitive and maybe even unrealistic.  So either approach - trying to PWM an impossible goal or using DAC's and pretending you will hit that kind of accuracy doesn't matter.  Outside of a lab environment I am not sure it is a realistic goal.

I thought the 28069 was a good choice for the job because I want to use the HRCAP features to capture the 1PPS output of the GPS receiver (this case the u-Blox LEA-6T-1) and the 10MHz output of the 270 OCXO (MTI-Milliren) - the HRCAP can make the measurement withIin 300ps (my understanding from the docs) - I would then 'EFC' discipline the OCXO with that measurement wrt the 1PPS of the LEA-6T-1.  That is the real feedback and will more than likely be more accurate than any DAC output I can hope for - but the DAC is driving the EFC so to speak.  

There is tons of blather on this subject on the Interwebs - and there are some 'simplified' solutions that are nothing more than dividers and XORing the signals - but that doesn't do much for really creating the correct voltage for the EFC.  That is a PLL sort of solution.  I wanted to try the HRCAP method and see what could be 
done with that.  I doubt our power supply even will ever be down to 179 nV of ripple voltage. 

Thanks!
John W. 

John,

Sounds like a challenging application.  Definitely outside of my expertise, but I will see what I can do to help.

*If you want to calculate the additional HRPWM resolution, you can take the log2() of the number of MEP steps from this table.  At 90MHz, log2() of 62 gives you just under 6 additional bits of resolution.

*I think the problem with using 2 x 16-bit DACs and summing them would be that a 16-bit DAC is probably going to have noise at the output which limits the SNR to around 15-bits.  One DAC gets unity gain and the other attenuated? In this case the unity gain also applies to the 15-bit noise, giving you 15-bits of noise performance on the output? Really you would need a 16-bit DAC with 24-bit noise performance?  

*It looks like TI has 24-bit precision/audio DACs.  Maybe the best bet is to use the F2806x HRCAP, then serially control a 24-bit low speed audio DAC that has been isolated as much as possible to get reasonable noise performance? Maybe the guys over at the precision data converters / audio converters (not sure exactly which one) can recommend a part for this (http://e2e.ti.com/support/data_converters/audio_converters/default.aspx or http://e2e.ti.com/support/data_converters/precision_data_converters/default.aspx).  They may also be able to better advise about the feasibility of summing two 16-bit DACs.

Hello Devin,

In the 90MHz example - the HRPWM effective bit rate would be -> Log2 62 + 10.3 ~ 16.25 bits?

The summer is unity gain - correct.  Yep, noise is an issue.

There was a Burr Brown part that was used in the past - the PCM61P I believe.  

I will ask over in the other groups.  I am sure this is not a new problem - how to get the most real resolution as possible of of a DAC.

Thanks,
johnw 

That is the effective resolution at the max ePWM speed.  At the minimum speed, the base resolution will be 16 bits instead of 10.3 bits.  

Devin,

OK - thanks for clearing that up.  

Regards,
John