Are there some wrong in SPRU807B?

xufeihx

Reference to example 3 on the page 32 of SPRU807B,I write a progran as bellow:

// ECAP module 1 config
ECap1Regs.ECCTL1.bit.CAP1POL = EC_RISING;
ECap1Regs.ECCTL1.bit.CAP2POL = EC_RISING;
ECap1Regs.ECCTL1.bit.CAP3POL = EC_RISING;
ECap1Regs.ECCTL1.bit.CAP4POL = EC_RISING;
ECap1Regs.ECCTL1.bit.CTRRST1 = EC_DELTA_MODE;
ECap1Regs.ECCTL1.bit.CTRRST2 = EC_DELTA_MODE;
ECap1Regs.ECCTL1.bit.CTRRST3 = EC_DELTA_MODE;
ECap1Regs.ECCTL1.bit.CTRRST4 = EC_DELTA_MODE;
ECap1Regs.ECCTL1.bit.CAPLDEN = EC_ENABLE;
ECap1Regs.ECCTL1.bit.PRESCALE = EC_DIV1;
ECap1Regs.ECCTL2.bit.CAP_APWM = EC_CAP_MODE;
ECap1Regs.ECCTL2.bit.CONT_ONESHT = EC_CONTINUOUS;
ECap1Regs.ECCTL2.bit.SYNCO_SEL = EC_SYNCO_DIS;
ECap1Regs.ECCTL2.bit.SYNCI_EN = EC_DISABLE;
ECap1Regs.ECCTL2.bit.TSCTRSTOP = EC_RUN; // Allow TSCTR to run
// Run Time ( e.g. CEVT1 triggered ISR call)

// Run Time in ISR(every 25 us)
        if(ECap1Regs.ECFLG.bit.CEVT1 != 0) // Check status of one entry of first event of ECAP1 pin
          {
           EventPeriod1 = ECap1Regs.CAP1;
          EventPeriod2 = ECap1Regs.CAP2;
          EventPeriod3 = ECap1Regs.CAP3;
          EventPeriod4 = ECap1Regs.CAP4;

The GPIO24 input are pulse train, frequecy is about 5kHz.
There alway are:
          EventPeriod1 = 20,000
          EventPeriod2 = 0
          EventPeriod3 = 0
          EventPeriod4 = 0
My question .is,why ECap1Regs.CAP2,ECap1Regs.CAP3,ECap1Regs.CAP4 cann't catch CEVT2,CEVT3,CEVT4?

over 16 years ago

0 Lori Heustess over 16 years ago

TI__Guru* 93800 points

It is difficult to try and debug a code listing like this. I suggest starting with an example in the C280x C/C++ header files and peripheral examples. There is a eCAP example that captures the edges of an ePWM signal.

http://focus.ti.com/docs/toolsw/folders/print/sprc191.html

-Lori

0 xufeihx over 16 years ago in reply to Lori Heustess

Intellectual 500 points

1,It is not difficult to try and debug a code listing like this at all.

2,I mean that ,in Example 4 - Time Difference (Delta) Operation Rising and Falling Edge Trigger on the page 34 of SPRU807B,

What i mean is that if read ECap1Regs.CAP1 (e.g,EventPeriod1 = ECap1Regs.CAP1;) in ISR(every 25 us) before CEVT2,The Mod4 counter will be clear,so it is always CAP1 to capture time stamp.Is that right?

0 Omer Peleg over 15 years ago in reply to xufeihx

Intellectual 640 points

I am having the same problem. For some reason the ECFLG register doesn't provide the correct interrupt flag state.

I put a breakpoint inside this if statement:

if (ECap1Regs.ECFLG.bit.CEVT1 == 0)

{

GpioDataRegs.GPACLEAR.bit.GPIO12 = 1;

test++;

}

The program stops inside, but in my watch window, ECap1Regs.ECFLG.bit.CEVT1 is 1. In fact it is always 1, Even though I am clearing the flag.

Thanks,

Omer

0 Omer Peleg over 15 years ago in reply to Omer Peleg

Intellectual 640 points

I guess its not really the same problem because my program is working fine, but I am not sure why I am not seeing the accurate bit value in the watch window.

Thanks,

Omer

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Are there some wrong in SPRU807B?