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EPWM modules setup

Hello  Chris

I am sitting and analyzing function DRV_setupPwms. How synchronization of EPWM1,2,3 modules is done?  As I understand, three reference modulating waves Ta,Tb,Tc  are compared against  triangular waves which are IN PHASE.

It seems you don’t use SyncIn pulse to cause TBPHS register to be loaded into the TBCTR register. You don’t use Master-Slave scheme at all.

Instead you set up all three EPWM1,2,3 modules to work as Masters and use TBCLKSYNC bit of PCLKCR0 to synchronize them. Does it really work? Will TBCLK clocks be in phase over time?

Why you don’t use Master-Slave scheme as it is described in SPRUGE9E page 91 ?

Thank you

 

  • Hi, Andrey

    There are many ways to use the ePWM modules.The way we are using them they are all running off the same Time Base, each with a TB counter of 0.  We certainly could have used the master/slave approach but it isn't mandatory.

    You can see the Sync is accomplished at end of

    DRV_setupPwms()

      // first step to synchronize the pwms
      CLK_disableTbClockSync(obj->clkHandle);

      // since the PWM is configured as an up/down counter, the period register is set to one-half
      // of the desired PWM period
      PWM_setPeriod(obj->pwmHandle[PWM_Number_1],halfPeriod_cycles);
      PWM_setPeriod(obj->pwmHandle[PWM_Number_2],halfPeriod_cycles);
      PWM_setPeriod(obj->pwmHandle[PWM_Number_3],halfPeriod_cycles);

      // last step to synchronize the pwms
      CLK_enableTbClockSync(obj->clkHandle);

    //

    To be extra safe we could have written a 0 to the TbCloc before enabling.

    If I look at the DRV_setupPwms() function for Sync:

    PWMDAC_setSyncMode(obj->pwmDacHandle[cnt],PWM_SyncMode_EPWMxSYNC);

     I believe it is safer if disable the SYNC since we really aren't use it. That would be

    PWMDAC_setSyncMode(obj->pwmDacHandle[cnt],PWM_SyncMode_Disable);

     

    Do note that the PWMs are synchronized in the way we are using them.