Other Parts Discussed in Thread: CONTROLSUITE
Hi ,
We are trying to configure F28335 as an master and Slave using I2C bus on two eval boards. below is the way we are trying to configure master and slave,
// Master_init Routine
// Initialize I2C
I2caRegs.I2CSAR = 0x0050; // Slave address - EEPROM control code
I2caRegs.I2CSAR = 0x007E; //slave
I2caRegs.I2COAR = 0x007F; // own address
#if (CPU_FRQ_150MHZ) // Default - For 150MHz SYSCLKOUT
{
I2caRegs.I2CMDR.bit.IRS = 0;
I2caRegs.I2CPSC.all = 14; // Prescaler - need 7-12 Mhz on module clk (150/15 = 10MHz)
}
#endif
#if (CPU_FRQ_100MHZ) // For 100 MHz SYSCLKOUT
{
I2caRegs.I2CMDR.bit.IRS = 0;
I2caRegs.I2CPSC.all = 9; // Prescaler - need 7-12 Mhz on module clk (100/10 = 10MHz)
}
#endif
I2caRegs.I2CCLKL = 10; // NOTE: must be non zero
I2caRegs.I2CCLKH = 5; // NOTE: must be non zero
I2caRegs.I2CMDR.bit.IRS = 1;
I2caRegs.I2CIER.all = 0x24; // Enable SCD & ARDY interrupts
I2caRegs.I2CIER.all = 0x3c;
I2caRegs.I2CIER.all |= 0x0008; // RRDY
I2caRegs.I2CMDR.all = 0x0020; // Take I2C out of reset -- Slave
// Stop I2C when suspended
I2caRegs.I2CMDR.all = 0x0620; // master
I2caRegs.I2CMDR.all = 0x0030; // master
I2caRegs.I2CMDR.all = 0x0020; // slave
// Master_init Routine - ends here
// I2C Master to Slave Write function
I2caRegs.I2CSAR = 0x007E; //slave addr
I2caRegs.I2CMDR.all = 0x0030; // master
I2caRegs.I2CMDR.all ^= 0x0080; // bit 7 // rm
I2caRegs.I2CMDR.all ^= 0x0400; // bit 10
I2caRegs.I2CMDR.all ^= 0x0200; // bit 9
I2caRegs.I2CMDR.all ^= 0x2000; // bit 13 // stt
I2caRegs.I2CCNT = I2C_PACK_WORD_CNT;
for (i=0; i<I2C_PACK_WORD_CNT; i++)
{ I2caRegs.I2CDXR = buffer[i];
}
I2caRegs.I2CMDR.all ^= 0x2000; // bit 13
I2caRegs.I2CMDR.all ^= 0x0400; // bit 10
I2caRegs.I2CMDR.all ^= 0x0200; // bit 9
I2caRegs.I2CMDR.all = 0x0020; // slave
I2caRegs.I2CMDR.all = 0x6C20;
// I2C Master to Slave Write function - ends here
/*************************************************************************************************/
// Slave Init routin
// Initialize I2C
I2caRegs.I2CSAR = 0x0050; // Slave address - EEPROM control code
I2caRegs.I2CSAR = 0x007F; //slave
I2caRegs.I2COAR = 0x007E; // own address
#if (CPU_FRQ_150MHZ) // Default - For 150MHz SYSCLKOUT
{
I2caRegs.I2CMDR.bit.IRS = 0;
I2caRegs.I2CPSC.all = 14; // Prescaler - need 7-12 Mhz on module clk (150/15 = 10MHz)
}
#endif
#if (CPU_FRQ_100MHZ) // For 100 MHz SYSCLKOUT
{
I2caRegs.I2CMDR.bit.IRS = 0;
I2caRegs.I2CPSC.all = 9; // Prescaler - need 7-12 Mhz on module clk (100/10 = 10MHz)
}
#endif
I2caRegs.I2CCLKL = 10; // NOTE: must be non zero
I2caRegs.I2CCLKH = 5; // NOTE: must be non zero
I2caRegs.I2CMDR.bit.IRS = 1;
I2caRegs.I2CIER.all = 0x24; // Enable SCD & ARDY interrupts
I2caRegs.I2CIER.all = 0x3c;
I2caRegs.I2CIER.all |= 0x0008; // RRDY
I2caRegs.I2CMDR.all = 0x0020; // Take I2C out of reset -- Slave
// Stop I2C when suspended
I2caRegs.I2CMDR.all = 0x0020; // slave
}
// Slave init - ends here
can yu tell me what is the setting that i m missing out, so as to have a communication on my slave..?
