Hello,
Below is background:
1. Sci_echoback example is working all OK with my hyper-terminal.
2. I have Uart driver (Interrupt based, FIFO enabled to full - 4 regs in my chip) which works all great in LOOPBACK mode with following HW settings.
SciaRegs.SCICCR.all = 0x0007;
SciaRegs.SCICCR.bit.LOOPBKENA = 1;
SciaRegs.SCICTL2.bit.TXINTENA = 1;
SciaRegs.SCICTL2.bit.RXBKINTENA = 1;
SciaRegs.SCIHBAUD = 0x0000;
SciaRegs.SCILBAUD = SCI_PRD;
SciaRegs.SCIFFTX.all = 0xC020;
SciaRegs.SCIFFRX.all = 0x0024;
SciaRegs.SCIFFCT.all = 0x00;
SciaRegs.SCICTL1.all = 0x0023;
SciaRegs.SCIFFTX.bit.TXFIFOXRESET = 1;
SciaRegs.SCIFFRX.bit.RXFIFORESET = 1;
Now, I want to test this driver with hyper terminal by disabling LOOPBACK mode.
Issue: After I do this, I am facing a strange problem - Higher nibble (MSB 4 bits) of byte (8 bit data) is going wrong. Lower nibble (4 bits LSB) is transmitted and received correctly.
When doing TX (from controller) : Higher nibble is getting right shifted by 1 and 1 is added at MSB (shift is only at higher nibble, incase 1st bit of nibble is set after shift it will shift 4th bit of lower nibble but not further shift in LSB)
e.g.
0x61 ==> 0x81
33 ==> 9B
70 ==> B8
F0 ==> F8
78 ==> B8
When doing RX (to controller) : When we send data from hyper terminal to controller almost reverse pattern of above behavior is being done.
Now, Left shift of higher nibble by 1 and LSB (of higher nibble) is set as 0. Lower nibble is always remains unaffected here but higher nibble is wrong.
0x61 ==> 0xC1
0x62 ==> 0xC2
0x70 ==> 0xE0
0x41 ==> 0x81
Is there something I missed in settings? anyone else, please give some clues...
Thanks,
Varun
Update: I get framing error atleast for recieve... RXST register is 0000000010010010
