Hi. I am try to sample two out of phase 1 Mhz signal at a 12.5 Msamp/sec rate in a continuous run cacaded setup. I am not sure if I have set up correctly. I would appreciate any advice thanks.
#include "F28335_example.h" // Main include file
//Uint16 signala;
//Uint16 signalb;
// interrupt void adc_isr(void);
/**********************************************************************
* Function: InitAdc()
*
* Description: Initializes the ADC on the F2833x.
**********************************************************************/
void InitAdc(void)
{
//--- Power-up the ADC
//AdcRegs.ADCTRL3.all = 0x00EC; // Power-up reference and main ADC
AdcRegs.ADCTRL3.bit.ADCBGRFDN = 3; // Reference circuitry powered up
AdcRegs.ADCTRL3.bit.ADCPWDN = 1; // Analog circuitry inside the core is powered up
AdcRegs.ADCTRL3.bit.ADCCLKPS = 0; // ADCLK = HSPCLK/12 - gives 12.5 MHz clock for ADCLK if equal to 1
AdcRegs.ADCTRL3.bit.SMODE_SEL = 0x1; // Simultaneous mode selected
// bit 15-8 0's: reserved
// bit 7-6 11: ADCBGRFDN, reference power, 00=off, 11=on
// bit 5 1: ADCPWDN, main ADC power, 0=off, 1=on
// bit 4-1 0110: ADCCLKPS, clock prescaler, FCLK=HSPCLK/(2*ADCCLKPS)
// bit 0 0: SMODE_SEL, 0=sequential sampling, 1=simultaneous sampling
DelayUs(5000); // Wait 5 ms before using the ADC
//--- Configure the other ADC registers
AdcRegs.ADCREFSEL.bit.REF_SEL = 0; // ADC reference, 0=internal, 1=external
AdcRegs.ADCMAXCONV.all = 0; //1 conversion
// bit 15-7 0's: reserved
// bit 6-4 000: MAX_CONV2 value
// bit 3-0 0000: MAX_CONV1 value (0 means 1 conversion)
// Since we are only doing 1 conversion in the sequence, we only need to
// configure the ADCCHSELSEQ1 register, and only the CONV00 field. All
// other channel selection fields are don't cares in this example.
//AdcRegs.ADCTRL3.bit.SMODE_SEL = 0x1; // Setup simultaneous sampling mode
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0; // Convert Channel A0
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0; //Convert Channel A1
//AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 1; //Convert Channel A1
AdcRegs.ADCTRL1.bit.SEQ_CASC = 0x1; // Cascaded mode Enabled
AdcRegs.ADCTRL1.bit.SEQ_OVRD = 0; //Sequencer Override Disabled
AdcRegs.ADCTRL1.bit.CONT_RUN = 1; // Start Stop mode
AdcRegs.ADCTRL1.bit.CPS = 0; // divide by 1 12.5 Msamp/sec
AdcRegs.ADCTRL1.bit.ACQ_PS = 0; // 5 ADCCLK periods
AdcRegs.ADCTRL1.bit.SUSMOD = 00; // Emulation Suspend mode ignored
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 0;
//AdcRegs.ADCTRL1.all = 0x0710;
// bit 15 0: reserved
// bit 14 0: RESET, 0=no action, 1=reset ADC
// bit 13-12 00: SUSMOD, 00=ignore emulation suspend
// bit 11-8 0111: ACQ_PS (Acquisition), 0111 = 8 x ADCCLK
// bit 7 0: CPS (Core clock), 0: ADCCLK=FCLK/1, 1: ADCCLK=FCLK/2
// bit 6 0: CONT_RUN, 0=start/stop mode, 1=continuous run
// bit 5 0: SEQ_OVRD, 0=disabled, 1=enabled
// bit 4 1: SEQ_CASC, 0=dual sequencer, 1=cascaded sequencer
// bit 3-0 0000: reserved
AdcRegs.ADCTRL2.all = 0x0900;
// bit 15 0: ePWM_SOCB_SEQ, 0=no action
// bit 14 0: RST_SEQ1, 0=no action
// bit 13 0: SOC_SEQ1, 0=clear any pending SOCs
// bit 12 0: reserved
// bit 11 1: INT_ENA_SEQ1, 1=enable interrupt
// bit 10 0: INT_MOD_SEQ1, 0=int on every SEQ1 conv
// bit 9 0: reserved
// bit 8 1: ePWM_SOCA_SEQ1, 1=SEQ1 start from ePWM_SOCA trigger
// bit 7 0: EXT_SOC_SEQ1, 1=SEQ1 start from ADCSOC pin
// bit 6 0: RST_SEQ2, 0=no action
// bit 5 0: SOC_SEQ2, no effect in cascaded mode
// bit 4 0: reserved
// bit 3 0: INT_ENA_SEQ2, 0=int disabled
// bit 2 0: INT_MOD_SEQ2, 0=int on every other SEQ2 conv
// bit 1 0: reserved
// bit 0 0: ePWM_SOCB_SEQ2, 0=no action
//--- Enable the ADC interrupt
PieCtrlRegs.PIEIER1.bit.INTx6 = 1; // Enable ADCINT in PIE group 1
IER |= 0x0001; // Enable INT1 in IER to enable PIE group
/*while(1)
{
DelayUs(1000); //delay 1ms
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1
AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 1; // Start ADC conversion
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)
}*/
} // end InitAdc()
interrupt void adc_isr(void)
{
signala= AdcRegs.ADCRESULT0 >>4; //Read from two ADC Result Registers
signalb= AdcRegs.ADCRESULT1 >>4;
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 0; // Disable SEQ1 interrupt
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE
return;
}
//--- end of file -----------------------------------------------------
