[F28377D] CS0 of EMIF2

Hi,

 1. There is EM1CS0 in manual, but I can`t find 'EMIF2_CS0'.

This is an error in manual we'll correct this. Following tables has EMIF2 signals which  are missing in manual.

  2. EMIF2 has [11:0] Address pins, ist`n it?  So, I think that size is 64M.

2^12(row) * 2^12(col) * 4(bank) = 64M

This table also need to be corrcted. The max column address supported by SDRAM is 11bit (configuration field PAGESIZE). So that makes it only 32M x 16bit .

3. Does memory view(in CCS) support  the SDRAM adress?

Yes, this is supported. Is there any specific reason you asked this query?

We'll make the appropriate document updates in next revision. Thans for your feedback.

Regards,

Vivek Singh