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Dead-band module in TMS320F2808

vishal anand
Prodigy 75 points
Other Parts Discussed in Thread: TMS320F2808

Hi,


I'm using the dead-band module in the processor, TMS320F2808 for controlling IGBTs on the same leg of an H-bridge Inverter. I have a question about the minimum pulse-width that can be supported by the dead-band module.

My RED and FED counters are set to 260 (which corresponds to a delay of 2.6 usecs). If the pulse width of the control is 1 usecs, I observe that the dead-band module totally turns OFF the PWM Output. When I comment out the dead-band module code, I'm able to see the 1 usecs pulse at the PWM Output. However, when I turn back on the dead-band module, I do not see the pulses... Here's the configuration of the dead-band module that I'm using...

   EPwm1Regs.TBPRD = HZ50_DOWN_COUNT;                 // Time base = 2*TIMER_PRD = 0x9c4
   EPwm1Regs.TBPHS.half.TBPHS = 0x0000;             // Phase is 0
   EPwm1Regs.TBCTR = 0x0000;                        // Clear counter

   // Setup TBCLK
   EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_DOWN;        // Symmetrical mode
   EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;          // Disable phase loading - Master module
   EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW;            
   EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;    // Sync Down-stream module
   EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;         // High Speed Clock ratio is unity
   EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;            // Sysclock ratio is unity

   EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;      // Load registers every ZERO
   EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
   EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;    // Load on CTR = Zero    
   EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;    // Load on CTR = Zero

   // Setup compare
   EPwm1Regs.CMPA.half.CMPA = KHZ20_COUNT_TIMER_PRD >> 1;
   EPwm1Regs.CMPB = KHZ20_COUNT_TIMER_PRD >> 1;
 
   // down counter
   EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;             
   EPwm1Regs.AQCTLA.bit.CAD = AQ_SET;               
   EPwm1Regs.AQCTLB.bit.ZRO = AQ_SET;              
   EPwm1Regs.AQCTLB.bit.CAD = AQ_CLEAR;        

   // Enable Dead-band module
    EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
    EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
    EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    EPwm1Regs.DBFED = 260;
    EPwm1Regs.DBRED = 260;

Any help in this regard is highly appreciated !!!

Vishal

  • 0
    TI__Genius 11955 points

    If you want to maintain your 1uSec PWM output your dead-time (using dead-band hardware) has to be less than 1uSec. The dead-band module will turn off any pulse smaller than the specified dead-time.

    If your dead-time is higher than the min PWM pulse then you can disable the dead-band hardware and do this in software. Maintain your 1uSec pulse (duty D) for the upper switch and calculate the PWM compare values for the bottom switch (duty 1-D) in software and account for the desired dead-time in your calculation. This way you avoid the dead-band hardware turning off the PWM.

    Shamim