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Flash not programmable, but is readable, loads to ram, then again it programmable!?!

Other Parts Discussed in Thread: TMS320F28334

Hi All,


I've had problems before with flashing/debugging on other targets but that was explainable afterwards (unstable voltage supply), but I'm having strange behavior on two different boards with both a TMS320F28334 CPU on which I'm working for several weeks now (stable!). On a fresh booted system I'll run through the following steps with the reported results:

I'm just starting CCS5 and go for debug, the system compiles and erases the flash (well, it says it erases flash) and then it hangs on flashing (0%). Then it fails with the error:

And in the console I get the messages:

C28xx: Writing Flash @ Address 0x0033FFF6 of Length 0x00000003

C28xx: Erasing Flash Sector A

C28xx: GEL output:

ADC Calibration not complete, device is secure

C28xx: Can't run target CPU: Error 0x20000020/-1041 Severve Error during: Execution, device driver: Problem with Emulation Controller. It's recommended to Reset Emulator.......

C28xx: Flash operation timed out waiting for the algorithm to complete. Operation cancelled.

C28xx: Error writing Flash @ Address 0x0033FFF6 of Length 0x00000002

I push on "Cancel" and CCS5 hangs (Not responding). So I've to kill the program and restart.

So, to be sure it's not the debugger or the target I'll try the RAM build an example project LEDBLINK and debug on the target. This RAM program is running fine, so I reconfigure the program for Flash (CMD file) and again start a new debug session. You would think that it's a code security issue, so if that's the case I should not be able to flash the CPU with blinky when build for flash, nor see the content of the flash memory. Now the result is a running Blinky project in Flash..

 

So, yesterday I've spend 6 hours rebuilding, rebooting, un- en re-plugging the XDS510 JTAG, trying other examples, trying other boards, trying to lower my blood pressure and now I'm able to load the flash, I'm able to run the code and I'm able to see the content of the Flash. Or.. Am I able to erase the flash for real? I try this by using the on-chip flash tool for all sectors (including A: 0x33C000 - 0x33FFFF) and hit the button "erase flash". And now the erase works again..!? On memory location 0x0033FFF6 the memory browser shows FFFF FFFF. Also on line 0x0033FFF8 (pswd) shows: FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF

Then why is it sooooooo difficult flashing a systems that's NOT protected by CSM!?! I read more posts about failed flashing and locked up debuggers and that it's so fragile.. I think it is very fragile compared to CSS3 and the F280x DSPs. Never had problems like this, unless you did something real stupid.

Could someone explain to me what I'm doing wrong, if I'm doing something wrong, or how I troubleshoot next time more efficiently not spending 6hours with rising blood pressure.

Best regards,

Tjarco

  • And now, I'm getting again these messages about flash is secured and locked etc etc. The JTAG is already running on 2MHz instead of the default 13MHz and the configuration diagnostics tools gives 0 errors in 100loops.

  • I think I've got it stable now.. With the settings below. Are there setting needed for this CPU? Like Pulse TRST on startup?

  • Tjarco,

    Are all the boards you are trying with custom boards?  Or are some TI kits?  Same behavior on all?

    Can you provide your OS, OS version, and CCS version?


    Thank you,
    Brett

  • Hi Brett,

    Thank you for your reply. Yes it's a custom board, but also with the controller card I'm facing unstable connections. That's also through XDS510S by the way. The JTAG connection and Clock return path are as close as could to the DSP (see picture) and routing and grounding are fine.

    The system is running on XP PRO SP3 version 2002 (it's almost April I know) and CSS 5.5.0.00077 . JTAG is a spectrum digital "XDS510 USB Galvanic JTAG emulator" Rev.A.

    Best regards,

    Tjarco

  • Tjarco,

    I sent an email out to one of the engineers I know at Spectrum Digital and they said that, "in some cases they may have to reduce the TCK on the Galvanic", however I wasn't able to get much more than that. I do notice that the JTAG you are using is different from the standard 14-pin JTAG connection, so that also may be (but most likely isn't) playing a part.

    Let us know if the issue starts popping up again with your new target configuration settings.


    Thank you,
    Brett

  • Hi Bret,


    Thank you for your reply and info. Yes, we're using different JTAG header reducing boardspace. We're working with this header now for 3 years without issues on F280x targets at full speed.

    I googled around and spectrum digital states:

    4.1.12
    Pulse TRST on startup
    When selected the TRSTn pin will be pulsed high-low -high during emulation startup. Some TI processors need to see a rising-falling-rising edge sequence on the TRSTn pin to clear and set specific emulation modes which are related to the EMUx pins.
    Is this typical for the TMS320F2833x?
    Best regards,
    Tjarco