In case you have ever looked at the ADC formula in the datasheet and wondered why the equations are broken into three sections, here's an explanation:
1LSB = (VREFHI-VREFLO)/(2^N), where N is the number of bits in the converter Digital output transitions from 0 to 1 occurs at 0.5LSBs above VREFLO Digital output transitions from (2^N)-2 to (2^N)-1 occurs at 1.5LSBs below VREFHI
This is true based on the formula we provide:
If input voltage is 0.5*(3/4096), the formula gives an output of 0.5, which is lowest output that will be rounded to 1, so the first transition is indeed 0.5LSBs above VREFLO If input voltage is 3.0 – 1.5*(3/4096), the formula gives an output of 4094.5, which is the lowest output that will be rounded to 4095, so the last transition is indeed 1.5LSBs below VREFHI.
The linear range is the input range where the ideal quantization error magnitude is < 0.5 LSBs. With standard ADC transitions, the linear input range is VREFLO – 0.5LSBs to VREFHI – 0.5 LSBs, not VREFLO to VREFHI.