• State
  • Locked Locked
  • Replies 2 replies
  • Subscribers 82 subscribers
  • Views 804 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Trouble with CLA PWM access

James Kitzman
Prodigy 20 points

I am using the 28035 Control Stick and am working from a code base that is using a #define approach for register access rather than the TI bit field and union header files, and I am having trouble accessing the EPWM CMPA register from the CLA. The follwoing is a portion of my assembly code to simply change the duty cycle of my PWM task.

        .include piccolo_cla.inc
        .cdecls   C,LIST,"cla_shared.h"

        .sect    "ClaProg"
        .align  2


_ClaTask3:
        MMOVXI  MR0,#0x0177
        MMOV16  @CMPA1,MR0
        MSTOP
        MNOP
        MNOP
        MNOP
_ClaT3End:

And the assosiated .inc file section

; EPWM
EPWM1_BASE              .set    0x6800
TBSTS1                  .set    EPWM1_BASE+0x1
TBPHSHR1                .set    EPWM1_BASE+0x2
TBPHS1                  .set    EPWM1_BASE+0x3
TBCTR1                  .set    EPWM1_BASE+0x4
TBPRD1                  .set    EPWM1_BASE+0x5
CMPAHR1                 .set    EPWM1_BASE+0x8
CMPA1                   .set    EPWM1_BASE+0x9
CMPB1                   .set    EPWM1_BASE+0xA
DBRED1                  .set    EPWM1_BASE+0x10
DBFED1                  .set    EPWM1_BASE+0x11
TZSEL1                  .set    EPWM1_BASE+0x12
TZCTL1                  .set    EPWM1_BASE+0x14
TZEINT1                 .set    EPWM1_BASE+0x15
TZFLG1                  .set    EPWM1_BASE+0x16
TZCLR1                  .set    EPWM1_BASE+0x17
TZFRC1                  .set    EPWM1_BASE+0x18
ETSEL1                  .set    EPWM1_BASE+0x19
ETPS1                   .set    EPWM1_BASE+0x1A
ETFLG1                  .set    EPWM1_BASE+0x1B
ETCLR1                  .set    EPWM1_BASE+0x1C
ETFRC1                  .set    EPWM1_BASE+0x1D

The task seems to be running. I have set up and interrupt to toggle a GPIO line when the CLA interrupt is generated. The register does not seem to be updating though as the PWM duty cycle never changes.

I am able to make this work with the following code when using the TI bit field and union, but the person I am writing this for does not want to use the TI supplied header files. Is there a way for me to update the CMPA register using the above method? Is ther an error I am not seeing?

_ClaTask3:
        MMOVXI  MR0,#0x0177
        MMOV16  @_EPwm1Regs.CMPA.half.CMPA,MR0
        MSTOP
        MNOP
        MNOP
        MNOP
_ClaT3End:

 

Thanks,

James

  • 0
    Mastermind 7585 points

    James,

    what is the machine code of your instruction "MMOV16 @CMPA1,MR0"?  it should be the same as for the header-file translation.

    I think the machine code should be: 0x75C0 6809.

     

  • 0 in reply to Frank Bormann
    Prodigy 20 points

    Thanks for the response.

    The machine code is loaded as follows for CLA TAsk 3:

    Address 009010 0177
    Address 009011 7880
    Address 009012 6809
    Address 009013 75C0
    Address 009014 0000
    Address 009015 7F80
    Address 009016 0000
    Address 009017 7FA0
    Address 009018 0000
    Address 009019 7FA0
    Address 00901A 0000
    Address 00901B 7FA0
    Address 00901C 0000

    Which should be:

    MMOVXI MR0,#0x0177 = 0x7880 0177

    MMOV16 @CMPA1,MR0 = 0x75C0 6809

    MSTOP = 0x7F80 0000

    MNOP = 0x7FA0 0000

    MNOP = 0x7FA0 0000

    MNOP = 0x7FA0 0000

     

     

    Is it possible for the CLA_3 interrupt on the main core to be tripped without the correspnding cla task actually running?

    Thanks,

    James