This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

F28335, EMU0 and EMU1 signal generation

Hi all,

I am using the TMS320F28335 Delfino Experimental kit.

I am trying to understand how the connection and control signals work between the USB connector (JP2) to JTAG device (F28335) via the  FTDI chip (FT2232D) to Emulator header (14-pin).

The data from the USB is given to the FTDI chips, which provides all the signals (TCK,TMS,TDO,TDI and TRSTn) to the Emulator header, except the EMU0 and EMU1. The EMU0/1 are connected to the F28335 via a pull pup resistor of 4.7K.  

I read that the state of  EMU0/1 are used to detect Wait-in Reset which is controlled by debugger. From debugger I understand use of CCS software or other debugging software. 

I have four question.

How are the EMU0/1 signals generated or changed by the debugger if there is no connection between the EMU pins and FTDI chip ? As they are only connected with F28335.

What is Wait-in Reset ? Is it the option available in CCS to reset the CPU ?

What other purpose are served by the EMU pins?

What is the jumper J9, near the JTAG header used for?

Thank you

Best Regards,

Pankaj