F28069 ADC setup to work as sequencer?

Hi Alex,

As I understand it, the ePWM is being used as a timer only to trigger the ADC, and it runs at a fixed frequency of 40KHz?

Can you setup the ePWM to run at 20KHz with ePWM ADCSOCA and ADCSOCB evenly spaced (I think up/down count with A triggered on PRD and B triggered on ZERO).  Then setup SOC0-SOC4 to use ePWM ADCSOCA as the trigger and SOC6-SOC10 to use ePWM ADCSOCB as the trigger?

Hi Devin,

Thanks for helping me.

As I wrote before, I am using module ePWM1 and ePWM2 (High-resolution, only A outputs) to control the high-frequency full-bridge of the LLC converter. As MOSFETS of the full-bridge are switching in a diagonal way, I can manage to do it with just 2 PWM gate signals. The switching frequency (Fsw) changes between 130kHz and 200kHz.

On the other hand, Timer0 is configured to generate interrupts at 40kHz. There's the mean calculation, state-machine and the controller.

40kHz/Fsw = 4samples (aprox.) It's quicker to calculate the samples mean dividing by 4 (just shifting >>2) than by 3 or 5 samples. Suposing that I always take the last 4 samples of each channel to calculate the mean, I have to save these 24 ADC values. To save them, I purpose to use the ADC sequence explained before. Every 2 PWM periods, I'd like to have an interrupt where I would save the 12 result values in the highest positions of a 24-size buffer. When the next 2 PWM periods finish, I would have another interrupt, saving the 12 result values in the lowest positions of the buffer. For next periods, results are going to overwrite the oldest ones in the buffer.

I could also do that (convert + channels + save to buffer) every PWM period, but it would take some time in every PWM period which I might need for other interrupts (like Timer0) or other issues. BTW, it would be better in refreshing the ADC values stored in the buffer.

The idea you purposed could be right if the Fsw was fixed. As there's a closed loop, this frequency is always variing, so I'd have to synchronize constantly the PWM1,2 to a third PWM (PWM3 for example). PWM3 should be configured in every PWM1,2 period to make sure it is configured at half the Fsw. Also, synchronization pulses would make PWM3 counter to restart from 0, so in up-down mode, it would only appear the up-part (cause synchronization pulse would restart the counter at half the PWM3 period [not PRD] ). It would be different if the synchronization pulse could be generated every 2 PWM1,2 periods... but I think that's not possible.

Any other idea? Is it so difficult to use the SOC based ADC as if it was a Sequencer based ADC? Does the Round-Robin wheel have any MAXCONV-equivalent parameter just to sample 3 SOCs every time?

Thanks for your ideas,

Alex

Actually, the fastest way to copy this values is using DMA. I've never used it, so I'm going to read all possible information from TI and try to configure it correctly.

The main structure of the ADC saving is the same: convert 6 channels + save them in a buffer  (use a 24-size buffer to save 4 values of each channel).

When doing so, I have two options of saving the values depending on the RESULTx allocation in the buffer:

• RES0 - RES1 ... RES5 - RES0 - RES1 ... RES5 - RES0 - RES1... RES5 - RES0 - RES1... RES5

or

• RES0 - RES0 - RES0 - RES0 - RES1 - RES1 - RES1 - RES1 - RES2 - RES2 - RES2 - RES2 - RES3...

I supose the second one is better when accessing the values to calculate the mean:

(RES0+RES0+RES0+RES0) >>2

And the first way to save them is easier to configure. Am I wrong? Any hint?

Thanks,

Alex

Alex,

For the 40KHz ePWM, I think you can use it the same way you are using the CPU timer (asynchronous from the control ePWMs), but just have it have 2 synchronized trigger events.

The DMA would also work.  I think you will want to go with the first method because it will only require a single DMA channel.  You should still be able to easily calculate the average for that case.