communication between SPIA and SPIB

Hi!

I'm trying to test the communication between the 2 SPIs available on Piccolo f28069. I've configured SPI-A as master and SPI-B as slave. And I've connected SPISOMIA to SPISOMIB, SPISIMOA to SPISIMOB, SPICLKA to SPICLKB, and SPISTE to SPISTE. The problem is that the program can not go into either the TX or RX interrupt of SPIB (I put breakpoints inside the interrupts).  From the watch window, SpibRegs.SPIFFTX.TXFFINT=1 (always), SpibRegs.SPIFFRX.RXFFINT=0 (always). Is it because of priority problem? Here is the configuration for them:

void spi_fifo_init()

{

// Initialize SPI_A FIFO registers

   SpiaRegs.SPICCR.bit.SPISWRESET=0;   // Reset SPI

   SpiaRegs.SPICCR.all=0x000F;      //16-bit character, disable Loopback mode

   SpiaRegs.SPICTL.all=0x0017;      //Interrupt enabled, Master/Slave XMIT enabled

   SpiaRegs.SPISTS.all=0x0000;

   SpiaRegs.SPIBRR=0x0063;          // Baud rate

   SpiaRegs.SPIFFTX.all=0xC034;     // Enable FIFO's, set TX FIFO level to 4

   SpiaRegs.SPIFFRX.all=0x0034;     // Set RX FIFO level to 4

   SpiaRegs.SPIFFCT.all=0x00;

   SpiaRegs.SPIPRI.all=0x0010;

   SpiaRegs.SPICCR.bit.SPISWRESET=1;   // Enable SPI

   SpiaRegs.SPIFFTX.bit.TXFIFO=1;

   SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;

// Initialize SPI_B FIFO registers

   SpibRegs.SPICCR.bit.SPISWRESET=0;  // Reset SPI

   SpibRegs.SPICCR.all=0x000F;      //16-bit character, disable Loopback mode

   SpibRegs.SPICTL.all=0x0013;      //Interrupt enabled, Master/Slave XMIT enabled

   SpibRegs.SPISTS.all=0x0000;

   SpibRegs.SPIBRR=0x0063;          // Baud rate

   SpibRegs.SPIFFTX.all=0xC034;     // Enable FIFO's, set TX FIFO level to 4

   SpibRegs.SPIFFRX.all=0x0034;     // Set RX FIFO level to 4

   SpibRegs.SPIFFCT.all=0x00;

   SpibRegs.SPIPRI.all=0x0010;

   SpibRegs.SPICCR.bit.SPISWRESET=1;    // Enable SPI

   SpibRegs.SPIFFTX.bit.TXFIFO=1;

   SpibRegs.SPIFFRX.bit.RXFIFORESET=1;

}

Does anybody have an idea what I'm doing wrong?

Thanks,

Lebing