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ADC Errata and SOC Timing

Jon Stevens
Intellectual 335 points

Hello,

I am using a 28035 and initiating an SOC pulse from a PWM event (counter = 0) and understand the need to have a "dummy" sample as a workaround for the ADC errata. It all works fine, except that I really don't like the fact that it delays my first real sample by at least 300 or so nSec. Is there some way to compensate for this (i.e. advance the SOC a little bit to just before 0 from the PWM counter)?

Thanks,

Jon

 

  • 0
    TI__Guru 62975 points

    Jon,

    Yes, assuming that the EPWM is running continuously, you can generate a SOC pulse early using a CMPA or CMPB compare.  You would set the compare to be N counts before TBCTR=0.  This would effectively advance your trigger.  You will need to calculate the proper value of N based on your EPWM frequency.

    -Tommy

  • 0 in reply to tlee
    Intellectual 335 points

    Hi Tommy,

    Thanks for the reply - I cannot use CMPA as it is being used to create the PWM output and what I am trying to do it advance the SOC without changing the timing output.

    But since I am using the High Active Complementary mode of the PWM module I sounds like I can use CMPB to just create an SOC pulse.

    So if I am using the High Active Complementary mode - do I need to set the action qualifier for CMPB to "do nothing" or becuase I am using the complementary mode CMPB will never generate an event on EPWMB output?

    Thanks.

  • 0 in reply to Jon Stevens
    TI__Guru 62975 points

    Jon,

    I'm not very familiar with the details of how that mode is implemented.  I would think that it is safest to set the qualifier to "do nothing" just in case.

    -Tommy