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I2CFFTX[TXFFST] is 15 after transmission complete!

Tony Zhao
Prodigy 80 points

Dear all.

When I use I2C FIFO to communicate with an I2C EERPOM, there was something wrong: the data were not what I put into FIFO register. That was because, after transmission completed, the FIFO transmit registers status ( I2CFFTX[ TXFFST ] ) was 15 instead of zero. As a result,  the data in next transmission were unexpected.

I had to manually clear I2CFFTX[ TXFFRST ] to set I2CFFTX[ TXFFST ] to 0, then the communication was correct.

Is it a bug of F28335?

 

The initiate code of I2C module is:

    I2caRegs.I2CPSC.all = 14;    //150MHz

    I2caRegs.I2CCLKL = 48;    //Clock pulse width Low is 5.3us

    I2caRegs.I2CCLKH = 42;    //Clock pulse width High is 4.7us, so clock pulse frequency is 100KHz

    I2caRegs.I2CIER.all = 0x24;    //Enable SCD & ARDY interrupts

    I2caRegs.I2CMDR.all = 0x0020;    //take I2C out of reset. Stop I2C when suspend

    I2caRegs.I2CFFTX.all = 0x6040;    //Enable FIFO mode and TXFIFO, clear TXFFINT, disable TXFFINT

    I2caRegs.I2CFFRX.all = 0x2040;    //Enable RXFIFO, clear RXFFINT, disable RXFFINT

 

thanks!

tony Zhao

  • 0
    Prodigy 80 points

    Sorry to TI, it is my own fault.

    When the Write EEPROM function is completed, I call a function named PollACK() to detect if the Write operation is done.

    In PollACK(), firstly a dummy Write Operation is processed, if NACK is received, the code will retry dummy Write again and again until ACK is received.

    My fault lays here: when NACK is received, I didn't clear TXFFST field, which was added 1 automatically when registers were assigned values.

    And it happens that 16NACK is received before ACK.

    When meets ACK , FIFO sent out Byte Address of dummy Write,  and TXFFST minus 1 automatically.

    At last the value in TXFFST is 15.

     

    Thank you all.