• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 83 subscribers
  • Views 960 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

F28335 SCI baudrate configuration error

lemarchand olivier
Intellectual 270 points

hello,

i am using F28335 with ccS3.3. I try to validate SCI peripheral. I want to configure baud rate with 57600bauds.

i made the following configuration: BRR= 324(0x144) with a low speed clock of 150MHz. I send 0x55 to SCITXBUF and i observe that baudrate is divided by2 (28.8bauds instead of 57600).

I monitored XCLKOUT signal which shows a sysclockout @150MHz as expected and configured.

I tried to monitor SPI clock to identify an potential problem with LOSPCP but for SPI, BRR gives the correct result...

if someone has an idea about the root cause, you're welcome!

 

thanks in advance,

Olivier 

  • 0
    Genius 3735 points

    Olivier,

    According to the datasheet, Table 6-4 on page 125, the Low speed clock is rated for a maximum of 75 MHz.  I typically use the default value of 37.5 MHz.  Lower values reduce power consumption.

    Regards,

    Bill

  • 0 in reply to Bill Finger
    Intellectual 270 points

    hello,

    I tried with 37.5MHz using this instruction: SysCtrlRegs.LOSPCP.all = 0x0002;

    I still face the same problem. here is the SCI configuration I made:

    void InitSci(void){
     // Initialize SCI-A:

     SciaRegs.SCICCR.all=0x47;//0x67; // 1 stop bit, even parity, Loop back mode disabled,Idle mode, 8 bits data
     SciaRegs.SCICTL1.all=0x03; //  Enable Transmit operation Reset SCI module, Enable receive bits
     SciaRegs.SCICTL2.all=0x0; // disable interrupts
     
    // Enable FIFO operation
     SciaRegs.SCIFFTX.bit.SCIFFENA=1;

    // configuration of the FIFO registers
     SciaRegs.SCIFFRX.all=0x002;  // rise FIFO Interrupt flag when two 8 bits data are received
     SciaRegs.SCIFFCT.bit.CDC=0;  // disables auto baud alignment
     SciaRegs.SCIPRI.all=0x08;  // free run operation   

    // configuration of the SCI FIFO transmit register
     SciaRegs.SCIFFTX.bit.SCIRST=1; //to enable transmit operation
    //other bits unchanged
      
     
    // Baud rate configuration: objectif 57600bauds
     SciaRegs.SCIHBAUD=0x00;//0x01;
     SciaRegs.SCILBAUD=0x50; //0x44;   // 57600 bauds


     SciaRegs.SCIFFRX.bit.RXFIFORESET=1; // re-enable fifo operation
     SciaRegs.SCICTL1.bit.SWRESET=1; // exit from reset state

    I can't identify the problem. LOSPCP is correct. I checked by measuring SPI clock which is correct according to the configuration I made...

    any other idea is welcome.

    Olivier

  • 0 in reply to lemarchand olivier
    Intellectual 270 points

    Hi again,

     

    forget it! I made a mistake when meausring... with the scope I measured between 2 rising edges (i send 0x55 to SCI), but in that case I measure 2T...

     

    sorry.

  • 0 in reply to lemarchand olivier
    Genius 3735 points

    Don't worry; it happens to everybody.  I'm glad you figured it out.

    Take care,

    Bill

  • 0 in reply to lemarchand olivier
    Guru 192875 points

    forget it! I made a mistake when meausring... with the scope I measured between 2 rising edges (i send 0x55 to SCI), but in that case I measure 2T...

    Happens :)

    Goodluck & Regards,

    Gautam