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F28335 - Problem in intializing the PLLCR register using InitPll function

athavan sai
Prodigy 200 points

Hi,

I tried to change the PLLCR (multiplier) value using the InitPLL funtion residing at "DSP2833x_SysCtrl.c".

 I used the Table 21. PLLCR Bit Descriptions from "sprufb0d.pdf" as a reference to change the values of the input parameter "val" and "divsel". But during the process, the funtion works correctly only for val = 0xA and divsel = 2.\

Also is it possible for me to provide divsel as '3' and val 'other than 0xA', since I think other combinations would produce sysclockout less than 150 MHz.

Is this the normal behaviour? If so, please explain the behaviour.

  • 0
    Guru 192875 points

    Hi,

    Did you go through the DSP2833x_Examples.h file?

    Regards,

    Gautam

  • 0 in reply to Gautam Iyer
    Prodigy 200 points

    Hi,


    Yes I went through the DSP2833x_Examples.h file, in which the macro value of DSP28_PLLCR(0xAh) and DSP28_DIVSEL (0x2) has been enabled.

    But my question is, Clock out = (osc_clk * DSP28_PLLCR)/DSP28_DIVSEL. According to this formula, the values should be present such that it does not exceed 150MHz. But when I give values other default values for InitPLL, which wll give clkout less than 150Mhz, it should behave properly rite?..

    Please correct If I am wrong.