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GPIO latch problem in TMS320F28335

Other Parts Discussed in Thread: TMS320F28335

Hi Team,

We are using TMS320F28335 controller in one of our product development.

We have recently observed that when the product is operated at less than -20 Degree celsius or 

more than 60 degree celsius some of the controller pins are getting latched to high.

The architecture uses two DSC's(Both F28335)  and

the pin that is getting latched is connected between two processors.

Problem scenario :

1) One processor has the pin as output and on the other processor this is taken as input.

2) there is a 10K resistor in between the processors.

3) When the processor for which it is output pulls the pin low, the other processor reads it as high.

    It is observed that on one side of resistor the voltage is low and on the other side the voltage is high.

Queries:

1) We would like to know if there is any errata on silicon temperature range of operation

2) What is the minimum value of resistance that can be used.

3) Are latch-up issues observed with this processor earlier.

4) What are the scenarios when the pin can latch-up

Best Regards,

Viswanadham Y

  • Viswanadham,

    For the two GPIOs in question, is the pull-up inside the chip enabled or disabled (GPxPUD)?


    Thank you,
    Brett

  • The pins are configured in no pull up condition

  • Vis,

    1. Does this work correctly at room temperature?
    2. What is the tolerance of the resistor and how does it resistance vary with temperature?
    3. Is this behavior observed on multiple boards?
    4. Have you tried a lower valued resistor? (say 1K)
  • Vis,

    We don't have any latchup issues reported on this device.  We do have latchup testing and have passed this as part of the device qualification.

    It initially sounds to me that the 'input' buffer may be configured as an output (double check the GPIO configuration is in intput mode and the GPIO mux function is selected), or there is some other circuit pulling up on this side of the 10k ohm resistor.

    Can you report the voltages seen on either side of the resistor both at room temperature and at cold temperature?  These should be identical, else there is DC current flowing through this resistor.

    Thanks,
    Jason

  • Vis,

    Do you mean that there is a serial (current limiting?) resistor in between the two pins and nothing else is connected to either of the pins? If so, why such a large value? Typically current limiting resistors are on the order of 300 ohms or so. If, for instance the pull-up was enabled (just an example, I know you have said the pullups have been disabled) and was drawing around 100uA, a 10Kohm resistor would drop 1V across it. That's too much. Now, without the pullup it should only be leakage current, which I think is around 2uA if memory serves me. So, that's not much of a concern. Still 10K sounds very high.

    Or do you mean there is a 10K pullup connected to the node that directly connects the two pins. Your description makes it sound like the above paragraph, but I just want to be sure.

    To answer your questions specifically:
    1) We would like to know if there is any errata on silicon temperature range of operation
        Not that I am aware of. You can find the errata at http://www.ti.com/lit/pdf/sprz272 .

    2) What is the minimum value of resistance that can be used.
        You could use 0ohms and connect the pins directly. There is no requirement that you limit the current. From a fault tolerance viewpoint you may want to, but under normal operation you don't have to presuming you don't ever turn both output drivers on. Even with the pullups enabled on the input side, this will only draw 100 or 200uA, which is way under the rating for the buffers (most are rated to 4mA; this rating is to ensure Vol/Voh; certainly reliability is maintained at this rating, and probably beyond although we don't have thorough data to say exactly what level so the safe route is to stay under this 4mA limit for continuous operation).

    3) Are latch-up issues observed with this processor earlier.
        Certainly customers have done things before to cause processors to latch up. But these are no observations that I would call latch-up issues, or latch-up weaknesses in the processor.

    4) What are the scenarios when the pin can latch-up
        That is a difficult answer to be comprehensive on (probably even impossible). One known scenario is when a voltage is applied to a pin prior to powering up the device. Possibly driving a pin with too great of a voltage without any current limiting could cause latchup as well (like driving 5V onto a 3.3V rated pin). Naturally the next question is how much current is too much. It is difficult to pin that down exactly as there are so many factors from one board design to the next that can affect it.

    In your scenario, does power cycling make the issue go away? This is common of latchup. If not, it may not really be latchup.

    Regards,
    Dave Foley

     

  • Hi Hareesh,

    1. Does this work correctly at room temperature?

    Ans: The circuit works properly at room temperature and no issues are observed.

    2. What is the tolerance of the resistor and how does it resistance vary with temperature?

    Ans: The resistor tolerance is 0.1% and doesn’t vary mush with temperature.

    3. Is this behavior observed on multiple boards?

    Ans: Yes

    4. Have you tried a lower valued resistor? (say 1K)

    Ans: Yes we tried with 1K resistor and did not find the problem, nevertheless we are trying to find why the system is behaving differently for lower and normal operating temperature. The issue is also observed when the temperature is more than 60 Degree Temp.