Other Parts Discussed in Thread: TMS320F28335
We have a board with the following configurations.
Digital Signal Controller(DSC): TMS320F28335
CS6: Two 16 bit EEPROMs (32 bit XINTF) (XRD of both EEPROM is connected directly to DSC external read ‘XRD’)
CS7: Two 16 bit SRAMs (32 bit XINTF) (XRD is connected to DSC ‘XRD’, ‘XWE0’ is connected to Lower Bank as write enable(16 bit SRAM), ‘XWE1/A0’ is connected to Higher bank as write enable(16 bit SRAM))
Configuration Settings:
Stack Area: Internal 64KB RAM of DSC at address 0x8000
“.cinit, .text, .pinit, econst” is mapped at External ROM at address 0x100000
“.ebss” section is mapped at External RAM connected on CS7 at address 0x200000.
Debugger Tool: CCS5.5
Problem: We are using a lot of ‘Global’ and ‘Static’ variables for which we have to map ‘.ebss’ section in external ram at CS7. We have disabled the WDT at the start of code. We have also configured ‘XINTF’ ‘Zone 6’ and ‘Zone 7’ before we call the ‘c_int00’ run time support library.
We are using multiple 8 bit, 16 bit and 32 bit size variables (global and static) in our code. When we initialize an array of 32 bit variables of any size (even or odd number), the code works perfectly fine. e.g
Uint_32 Array1[] = {0x01, 0x02, 0x03};
The problem also doesn’t occur when we initialize array of even number of 16 bit variables. e.g.
Uint_16 Array2[] = {0x01, 0x02, 0x03, 0x04};
However, when we initialize an array of odd number of 16 bit variables. e.g .
Uint_16 Array3[] = {0x01, 0x02, 0x03};
The DSC WDT gets enabled and resets the DSC.
We also observed a glitch on ‘XRS’ pin of DSC. When we debugged the code, it has been observed that during execution of ‘c_int00’ where it copies the values of global variables from external ROM (.cinit section) to external RAM (.ebss section), the WDT gets enabled and DSC gets reset.
Anyone who can help to resolve the issue.
Regards
Umer