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2808 SPISTE issue in slave mode



Hi, I have a 2808 set up as a single slave on a SPI bus. My design didn't include STE since from all the documentation, this signal appears to be optional and can be tied low if only a single device is used as a slave on the bus. The problem I am having is with STE tied low, I get garbled data out from the slave when a clock is applied. If I connect STE from the master (tack in the wire to the DSP) then the data is always correct. This implies to me that the STE signal is doing more than just connecting the SPIDAT buffer to the SOMI pin. Can anyone elaborate as to why this device won't transmit correct data if STE is tied low and how to solve this problem without actively controlling STE?

  • I believe I just solved my own problem but I'll post here for others benefit. I had the 2808 GPIO19 pin configured as STE and had it tied low on my board. This was causing garbled data from the 2808 as a slave. I then set GPIO19 as a GPIO pin and now the SPI works correctly! This behavior doesn't seem logical, but it appears to work. Perhaps someone from Ti can explain why this works in one way but not the other.

    Thanks.

  • Bob,

    This behavior is defined in Table 4-8 of the GPIO and Peripheral Muxing chapter of spru712h. The SPISTE pin's default state is 0, so the SPI transmission is enabled. In this configuration, the state of GPIO19 is irrelevant to SPI operation.

    As for why it works one way but not the other, I will need a little more information from you.

    Have you captured any scope shots of the SPI signals? It is possible that there is noise on your SPISTE causing it to go high and disabling transmission. Have you tried configuring a different GPIO mux option for SPISTE? Is the behavior the same for all mux options?

    -Mark

  • Hi Mark,

    Thanks for your reply. After  getting everything working and shipping product yesterday, in hindsight I don't think this was the real issue. We were trying to use differential drivers in single ended mode and I believe we had a number of things going on and may have been misled by this event (disabling STE). Once we got the correct line drivers/receivers connected, the system seemed to work either way (With STE tied low and with it disabled).

    One note on another similar subject, the description of the use of the FIFO's in the technical manual is pretty sparse. It's not even clear how to load the Tx FIFO from the documentation. I eventually figured out that just writing multiple words to the SPITX register loads the FIFO. Is there a way to load individual FIFO positions?

    Regards,

    Bob