Hi, I have a 2808 set up as a single slave on a SPI bus. My design didn't include STE since from all the documentation, this signal appears to be optional and can be tied low if only a single device is used as a slave on the bus. The problem I am having is with STE tied low, I get garbled data out from the slave when a clock is applied. If I connect STE from the master (tack in the wire to the DSP) then the data is always correct. This implies to me that the STE signal is doing more than just connecting the SPIDAT buffer to the SOMI pin. Can anyone elaborate as to why this device won't transmit correct data if STE is tied low and how to solve this problem without actively controlling STE?