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Motor Phase Current Sample Timing

I ported my FOC PMSM motor control project from LVMultiAxis+PfcKit platform to DRV8312EVM platform, however,  I have not used the on-chip InstaSpin feature yet. My motor spins well, my question is about the sample timing of the three phase current.

I use ePWM1 SOCA for ADC SOC, the ePWM1 is configured up-down counting mode, AQCTLA is set to 0x0060 (i.e., CAU = 10b, CAD = 01b).

At first, I set ePWM1 SOCASEL = TBPRD because I thought that's the mid-point of PWM positive pulses. However, the phase samp data are incorrect, merely glitches.

Then I set ePWM1 SOCASEL = ZERO, the phase current data are all correct, and the plot waveforms show smooth sine waves.

So why the sample timing has to be set when the PWM counter is zero, where it is the mid-point of negative PWM pulses? Is the half H-bridge positively or negatively activated? When is the best sample timing of phase currents?

Thank you in advance for your support.

 

  • in a low shunt current based sampling system you would ideally like to sample all three currents directly at the period = 0 match.  This is the center of the low-side "on time" where the current is theoretically at the average of it's value between on and off. In a higher inductance motor this is the case. In a lower inductance motor it is not. The current switches much faster - does not "decay" - so you don't get a true average value necessarily.

    this is sort of discussed in this doc, though the charts are showing the high-side switches

    http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=spruhw0

    it's discussed to a much greater extent in SPRUHJ1 chapter 17

     

  • Chris,

    I know you are excellent, but to ask a few more questions to be sure.

    1. Did you mean CTR = ZERO event?

    2. Low -side is "on-time", did you mean the H-brige is nagative activated? If so, is the positive or negative part of the PWM signal used in duty ratio calculation?

    Thanks!

  • 1. Yes, when the CTR = 0, that is the center of the low-side on-time when using an up-down counter, which we do in all C2000 motor control projects.

    2. No. In each PWM cycle - not control cycle - the high-side PWM will be on for some time (with the low-side PWM off) and then the low-side PWM will be on for some time (with the high-side PWM off).

    the duty cycle is actually the difference between the two, but with the way you are thinking about it you can think of the high side on time as equivalent to the duty cycle.

     

  • Excellent! You've cleared my doubt.