EMIF IP of F28377D

Hi FSSer,

We have different versions for same EMIF IP used on different TI devices. Also each device has different bus architecture so arbitration schemes will be different.

I would suggest to use the device specifc TRM in this case?

Let me know if you have some specific queries in this regard.

Regards,

Vivek Singh

Vivek Singh, 

Thank you for reply.

I want to know that the F28377D EMIF can connect SDRAM at 100MHz.

I know that there is described as "can be connected at 100MHz" in the TRM.

However, My customer can not connect the SDRAM with F28377D EMIF(100MHz).

(Incidentally, My customer can connect at 50MHz)

Do you have actual result information(F28377D EMIF can connect SDRAM at 100MHz)?

Regards, 

FSSer

Hi FSSer,

Yes, EMIF on F28377D can connect SDRAm at 100MHz.

Do you have actual result information(F28377D EMIF can connect SDRAM at 100MHz)?

Yes, we have it working on our boards. 

Please check the configuration done in SDRAM TIMING REGISTER to make sure it's valid for 100MHz configuration.

Regards,

Vivek Singh

Hi Vivek

Thank you for your reply.

We've already checked in SDRAM TIMING RESISTER but can't solve this problem.
Our customer make sure properly operation up to EMIF CLK 60MHz but SDRAM is written same value in even adresses at EMIF CLK 100MHz.

Could you please provide your test source code ,  board's schematic and PCB.

Best regards.

FSSer

We're having issues trying to get the SDRAM to work too? If TI has any code to share, it would be very useful.

Hi,

For SDRAM access, please make sure you are using following intrinsics in your code -

For 16-bit read:

unsigned int variable = __addr32_read_uint16(unsigned long address);

For 32-bit read:

unsigned long variable = __addr32_read_uint32(unsigned long address);

For 16-bit write:

 __addr32_write_uint16(unsigned long address, unsigned short data);

For 32-bit write:

 __addr32_write_uint32(unsigned long address, unsigned long data);

Regards,

Vivek Singh

Hi, Vivek

Thank you for reply.

I already use this intrinsics function.

And, I was able to confirm that the SDRAM is operating correctly at EMIF clock 50MHz with this intrinsics function.

Please tell me the sample program have been added to controlSUITE.

I verify some more time.

Best Regards,

FSSer

Hi Vivek,

Thank you for your information.

I'll try to check when controlSUITE is updatede.

Regards,

FSSer

I had problems with even addresses also. In my configuration I did not have the GPIO QSEL registers set to asynchronous on the data lines. Might want to give that a shot.

Hi Vivek,

Thank you for your information.

I looked like a problem has improved when I tried it.

Regards,

FSSer