This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

HRPWM and low frequency



Hello all

I want to generate two PWM signals with a configurable frequency from 0 to 2.75kHz each. My PWM duty cycle should be configurable with a step of 100ps. I have seen the Piccolo DSP which has a HRPWM function. Could you confirm that with a clock frequency of 60MHz I will have a step of 180ps, and a configurable frequency between 916Hz to 2,75kHz? Is there a way to reduce the frequency below 916Hz?

Thank you for your help

  • Hi Mat,

    Note that from the Piccolo datasheet the typical step size of the HRPWM is 150 ps with a max of 310 ps.

    In regards to your other question, you can slow the PWM down further.  The TBCLK has its own dividers in the EPWM module.  Take a look at the TBCTL[CLKDIV] and TBCTL[HSPCLKDIV] in the EPWM user's guide.  Below is the link for the F2803x Piccolo device (but it is the same for all Piccolo devices other than F2837x devices as of today).

    http://www.ti.com/lit/ug/spruge9e/spruge9e.pdf

    Kris

  • Thank you for answer.

    Yes I can reduce my PWM value but I will not use the HRPWM and I will not have my resolution of 150ps is that right? I think that my resolution will be one clock period, i.e. 16.6ns with a clock at 60MHz?

  • Yes, you are correct.  If you wish to use the HRPWM functionality then TBCLK must be equal to SYSCLK for the F2802x, F2803x, and F2806x devices.  

    At 60 MHz you are correct, the basic EPWM resolution is 16.67 ns.  The HRPWM increases that resolution to the approxiamtely150 ps (315 ps worst case).

    This is probably not applicable for your use case, but more for anyone reading the thread in the future.  If you were to divide TBCLK down further using the CLKDIV or HSPCLKDIV, your EPWM resolution would be determined by the TBCLK frequency.  So if you made TBCLK = 30 MHz through these dividers, the resolution would be 33.3 ns.

  • OK I understand the functioning of the HRPWM. I will not use this option on my design because I need of a better resolution under 700Hz.

  • One note:
    When generating low-frequency PWM signals, you can often get better resolution from the eCAP (in APWM) mode.  This is because the eCAP module is based on a 32-bit timer instead of a 16-bit timer like the ePWM module.  Because of this, you often don't have to divide down SYSCLK for the module to do generate the PWM period you need.

    The negative is that the eCAP doesn't have a lot of the features which make the ePWM beneficial: high-resolution, deadband, a digital compare submodule, etc.  For some applications this may not be a big deal though.


    Thank you,
    Brett