Main step to downgrade from TMS320C28346 to TMS320F28335

Christian Rod

Other Parts Discussed in Thread: CONTROLSUITE

Hi everybody,

I have developped a perfectly working application on a C28346 a year or so ago but the lack of internal non-volatile memory and the only available package being BGA, I am looking for downgrading to a F28335.

My first impression was that it should be pretty easy. Seems I was wrong: I have been on it for 2 days and haven't make a single step to have something working. I keep getting the error #10099-D about not having enough memory space. Seems strange to me since the application is not that big, especially for a device such the F28335.

Could anyone indicate me a reference which would describe the main steps for the downgrade? Or am I missing something really simple?

Best regards,

Christian

over 10 years ago

0 Gautam Iyer over 10 years ago

Guru 192875 points

Hi Christian,

Christian Rod said:
Could anyone indicate me a reference which would describe the main steps for the downgrade? Or am I missing something really simple?

First of all, it would be better if you run your code through flash thus utilizing the maximum available memory. For this you can refer "flash_f28335" example present here:

C:\ti\controlSUITE\device_support\f2833x\v133\DSP2833x_examples_ccsv4\flash_f28335

Regards,

Gautam

0 Christian Rod over 10 years ago in reply to Gautam Iyer

Prodigy 210 points

Hi Gautam,

First of all, Thanks a lot for your answer.

Actually, that's what I have trying to do from the beginning. I have copy-pasted my code, step-by-step, from my working C28346 project to the new F28335 project, checking for errors. When finally everything should be working (includes, declaration of variables, etc..), I keep having an link error without explanations from the compiler.

This error seems to come from line 146 of F28335.cmd, which (see below)

I have never dealt before with linking problem. I have the feeling that it is not such a big deal but I don't even know where to start looking.

Do you have an idea?

Best regards and thanks again for your help.

Christian

0 Gautam Iyer over 10 years ago in reply to Christian Rod

Guru 192875 points

Christian, can you paste the screenshot of the error window?

Regards,

Gautam

0 Christian Rod over 10 years ago in reply to Gautam Iyer

Prodigy 210 points

Sure! I should have done it before.

Here it is:

0 Gautam Iyer over 10 years ago in reply to Christian Rod

Guru 192875 points

Can you try reducing the stack memory? Later (if successful), check your memory browser window while in debug mode for memory spread.

Regards,

Gautam

0 Christian Rod over 10 years ago in reply to Gautam Iyer

Prodigy 210 points

I am really sorry but I do not know what is the stack memory and how to reduce it.

Is it done from the project properties? I have not been able to find it :(

0 Gautam Iyer over 10 years ago in reply to Christian Rod

Guru 192875 points

Christian Rod said:

I am really sorry but I do not know what is the stack memory and how to reduce it.

Is it done from the project properties? I have not been able to find it :(

Project -> Properties -> Build -> C2000 Linker -> Basic Options -> Set C system Stack size -> Try reducing the default one to 0x200

Regards,

Gautam

0 Christian Rod over 10 years ago in reply to Gautam Iyer

Prodigy 210 points

Thanks,

I tried to reduce to 0x200. The output is the same.

I join the .map. Maybe this can help.

Best regards,

Christian

5023.dotMapFile.txt

******************************************************************************
             TMS320C2000 Linker PC v6.1.0                      
******************************************************************************
>> Linked Mon Oct 13 15:36:44 2014

OUTPUT FILE NAME:   <Example_28335_Flash.out>
ENTRY POINT SYMBOL: "code_start"  address: 0033fff6


MEMORY CONFIGURATION

         name            origin    length      used     unused   attr    fill
----------------------  --------  ---------  --------  --------  ----  --------
PAGE 0:
  ZONE0                 00004000   00001000  00000000  00001000  RWIX
  RAML0                 00008000   00001000  0000001f  00000fe1  RWIX
  RAML1                 00009000   00001000  00000000  00001000  RWIX
  RAML2                 0000a000   00001000  00000000  00001000  RWIX
  RAML3                 0000b000   00001000  00000000  00001000  RWIX
  ZONE6                 00100000   00100000  00000000  00100000  RWIX
  ZONE7A                00200000   0000fc00  00000000  0000fc00  RWIX
  FLASHH                00300000   00008000  00000000  00008000  RWIX
  FLASHG                00308000   00008000  00000000  00008000  RWIX
  FLASHF                00310000   00008000  00000000  00008000  RWIX
  FLASHE                00318000   00008000  00000000  00008000  RWIX
  FLASHD                00320000   00008000  0000001f  00007fe1  RWIX
  FLASHC                00328000   00008000  00000000  00008000  RWIX
  FLASHA                00338000   00007f80  00001ca9  000062d7  RWIX
  CSM_RSVD              0033ff80   00000076  00000076  00000000  RWIX
  BEGIN                 0033fff6   00000002  00000002  00000000  RWIX
  CSM_PWL               0033fff8   00000008  00000008  00000000  RWIX
  ADC_CAL               00380080   00000009  00000007  00000002  RWIX
  OTP                   00380400   00000400  00000000  00000400  RWIX
  IQTABLES              003fe000   00000b50  00000000  00000b50  RWIX
  IQTABLES2             003feb50   0000008c  00000000  0000008c  RWIX
  FPUTABLES             003febdc   000006a0  00000000  000006a0  RWIX
  ROM                   003ff27c   00000d44  00000000  00000d44  RWIX
  RESET                 003fffc0   00000002  00000000  00000002  RWIX
  VECTORS               003fffc2   0000003e  00000000  0000003e  RWIX

PAGE 1:
  BOOT_RSVD             00000000   00000050  00000000  00000050  RWIX
  RAMM0                 00000050   000003b0  00000000  000003b0  RWIX
  RAMM1                 00000400   00000400  00000200  00000200  RWIX
  DEV_EMU               00000880   00000180  000000d0  000000b0  RWIX
  FLASH_REGS            00000a80   00000060  00000008  00000058  RWIX
  CSM                   00000ae0   00000010  00000010  00000000  RWIX
  ADC_MIRROR            00000b00   00000010  00000010  00000000  RWIX
  XINTF                 00000b20   00000020  0000001e  00000002  RWIX
  CPU_TIMER0            00000c00   00000008  00000008  00000000  RWIX
  CPU_TIMER1            00000c08   00000008  00000008  00000000  RWIX
  CPU_TIMER2            00000c10   00000008  00000008  00000000  RWIX
  PIE_CTRL              00000ce0   00000020  0000001a  00000006  RWIX
  PIE_VECT              00000d00   00000100  00000100  00000000  RWIX
  DMA                   00001000   00000200  000000e0  00000120  RWIX
  MCBSPA                00005000   00000040  00000025  0000001b  RWIX
  MCBSPB                00005040   00000040  00000025  0000001b  RWIX
  ECANA                 00006000   00000040  00000034  0000000c  RWIX
  ECANA_LAM             00006040   00000040  00000040  00000000  RWIX
  ECANA_MOTS            00006080   00000040  00000040  00000000  RWIX
  ECANA_MOTO            000060c0   00000040  00000040  00000000  RWIX
  ECANA_MBOX            00006100   00000100  00000100  00000000  RWIX
  ECANB                 00006200   00000040  00000034  0000000c  RWIX
  ECANB_LAM             00006240   00000040  00000040  00000000  RWIX
  ECANB_MOTS            00006280   00000040  00000040  00000000  RWIX
  ECANB_MOTO            000062c0   00000040  00000040  00000000  RWIX
  ECANB_MBOX            00006300   00000100  00000100  00000000  RWIX
  EPWM1                 00006800   00000022  00000022  00000000  RWIX
  EPWM2                 00006840   00000022  00000022  00000000  RWIX
  EPWM3                 00006880   00000022  00000022  00000000  RWIX
  EPWM4                 000068c0   00000022  00000022  00000000  RWIX
  EPWM5                 00006900   00000022  00000022  00000000  RWIX
  EPWM6                 00006940   00000022  00000022  00000000  RWIX
  ECAP1                 00006a00   00000020  00000020  00000000  RWIX
  ECAP2                 00006a20   00000020  00000020  00000000  RWIX
  ECAP3                 00006a40   00000020  00000020  00000000  RWIX
  ECAP4                 00006a60   00000020  00000020  00000000  RWIX
  ECAP5                 00006a80   00000020  00000020  00000000  RWIX
  ECAP6                 00006aa0   00000020  00000020  00000000  RWIX
  EQEP1                 00006b00   00000040  00000040  00000000  RWIX
  EQEP2                 00006b40   00000040  00000040  00000000  RWIX
  GPIOCTRL              00006f80   00000040  0000002e  00000012  RWIX
  GPIODAT               00006fc0   00000020  00000020  00000000  RWIX
  GPIOINT               00006fe0   00000020  0000000a  00000016  RWIX
  SYSTEM                00007010   00000020  00000020  00000000  RWIX
  SPIA                  00007040   00000010  00000010  00000000  RWIX
  SCIA                  00007050   00000010  00000010  00000000  RWIX
  XINTRUPT              00007070   00000010  00000010  00000000  RWIX
  ADC                   00007100   00000020  0000001e  00000002  RWIX
  SCIB                  00007750   00000010  00000010  00000000  RWIX
  SCIC                  00007770   00000010  00000010  00000000  RWIX
  I2CA                  00007900   00000040  00000022  0000001e  RWIX
  RAML4                 0000c000   00001000  00000000  00001000  RWIX
  RAML5                 0000d000   00001000  00000000  00001000  RWIX
  RAML6                 0000e000   00001000  00000000  00001000  RWIX
  RAML7                 0000f000   00001000  00000000  00001000  RWIX
  ZONE7B                0020fc00   00000400  00000000  00000400  RWIX
  FLASHB                00330000   00008000  00000000  00008000  RWIX
  CSM_PWL               0033fff8   00000008  00000008  00000000  RWIX
  PARTID                00380090   00000001  00000001  00000000  RWIX


SECTION ALLOCATION MAP

 output                                  attributes/
section   page    origin      length       input sections
--------  ----  ----------  ----------   ----------------
.pinit     0    00338000    00000000     UNINITIALIZED

.ebss      1    00000000    00001051     FAILED TO ALLOCATE
ramfuncs   0    00320000    0000001f     RUN ADDR = 00008000
                  00320000    0000001b     DSP2833x_SysCtrl.obj (ramfuncs)
                  0032001b    00000004     DSP2833x_usDelay.obj (ramfuncs)

.text      0    00338000    00001290     
                  00338000    00000654     SpiInterrupt.obj (.text:retain)
                  00338654    00000316     DSP2833x_DefaultIsr.obj (.text:retain)
                  0033896a    00000188     init.obj (.text)
                  00338af2    000000f9     SignalsGeneration.obj (.text:retain)
                  00338beb    000000f6     DSP2833x_Xintf.obj (.text)
                  00338ce1    000000f4     SignalsFunctions.obj (.text)
                  00338dd5    000000f3     DSP2833x_SysCtrl.obj (.text)
                  00338ec8    0000009e     SCIaRxInterrupt.obj (.text:retain)
                  00338f66    0000008a     BootLoaderFunctions.obj (.text)
                  00338ff0    00000074     DSP2833x_CpuTimers.obj (.text)
                  00339064    00000061     ExternalSynchro.obj (.text:retain)
                  003390c5    00000048     DSP2833x_Sci.obj (.text)
                  0033910d    00000046     rts2800_fpu32.lib : boot.obj (.text)
                  00339153    0000002a                       : l_div.obj (.text)
                  0033917d    00000028     DSP2833x_PieCtrl.obj (.text)
                  003391a5    00000022     rts2800_fpu32.lib : i_div.obj (.text)
                  003391c7    00000021     Example_2833xFlash.obj (.text)
                  003391e8    00000020     DSP2833x_PieVect.obj (.text)
                  00339208    00000019     rts2800_fpu32.lib : args_main.obj (.text)
                  00339221    00000019                       : exit.obj (.text)
                  0033923a    00000019     rts2800_fpu32_fast_supplement.lib : div_f32.obj (.text)
                  00339253    00000017     DSP2833x_I2C.obj (.text)
                  0033926a    00000015     DSP2833x_MemCopy.obj (.text)
                  0033927f    00000009     rts2800_fpu32.lib : _lock.obj (.text)
                  00339288    00000008     DSP2833x_CodeStartBranch.obj (.text)

.cinit     0    00339290    000008b4     
                  00339290    000007d4     sinusLUT.obj (.cinit)
                  00339a64    000000ba     Example_2833xFlash.obj (.cinit)
                  00339b1e    0000000a     rts2800_fpu32.lib : _lock.obj (.cinit)
                  00339b28    0000000a                       : exit.obj (.cinit)
                  00339b32    00000008     SpiInterrupt.obj (.cinit)
                  00339b3a    00000004     SignalsFunctions.obj (.cinit)
                  00339b3e    00000004     SignalsGeneration.obj (.cinit)
                  00339b42    00000002     --HOLE-- [fill = 0]

.econst    0    00339b44    00000165     
                  00339b44    00000100     DSP2833x_PieVect.obj (.econst)
                  00339c44    00000065     SCIaRxInterrupt.obj (.econst:.string)

csm_rsvd   0    0033ff80    00000076     
                  0033ff80    00000076     DSP2833x_CSMPasswords.obj (csm_rsvd)

codestart 
*          0    0033fff6    00000002     
                  0033fff6    00000002     DSP2833x_CodeStartBranch.obj (codestart)

csmpasswds 
*          0    0033fff8    00000008     
                  0033fff8    00000008     DSP2833x_CSMPasswords.obj (csmpasswds)

.adc_cal   0    00380080    00000007     NOLOAD SECTION
                  00380080    00000007     DSP2833x_ADC_cal.obj (.adc_cal)

.reset     0    003fffc0    00000002     DSECT
                  003fffc0    00000002     rts2800_fpu32.lib : boot.obj (.reset)

vectors    0    003fffc2    00000000     DSECT

.stack     1    00000400    00000200     UNINITIALIZED
                  00000400    00000200     --HOLE--

DevEmuRegsFile 
*          1    00000880    000000d0     UNINITIALIZED
                  00000880    000000d0     DSP2833x_GlobalVariableDefs.obj (DevEmuRegsFile)

FlashRegsFile 
*          1    00000a80    00000008     UNINITIALIZED
                  00000a80    00000008     DSP2833x_GlobalVariableDefs.obj (FlashRegsFile)

CsmRegsFile 
*          1    00000ae0    00000010     UNINITIALIZED
                  00000ae0    00000010     DSP2833x_GlobalVariableDefs.obj (CsmRegsFile)

AdcMirrorFile 
*          1    00000b00    00000010     UNINITIALIZED
                  00000b00    00000010     DSP2833x_GlobalVariableDefs.obj (AdcMirrorFile)

XintfRegsFile 
*          1    00000b20    0000001e     UNINITIALIZED
                  00000b20    0000001e     DSP2833x_GlobalVariableDefs.obj (XintfRegsFile)

CpuTimer0RegsFile 
*          1    00000c00    00000008     UNINITIALIZED
                  00000c00    00000008     DSP2833x_GlobalVariableDefs.obj (CpuTimer0RegsFile)

CpuTimer1RegsFile 
*          1    00000c08    00000008     UNINITIALIZED
                  00000c08    00000008     DSP2833x_GlobalVariableDefs.obj (CpuTimer1RegsFile)

CpuTimer2RegsFile 
*          1    00000c10    00000008     UNINITIALIZED
                  00000c10    00000008     DSP2833x_GlobalVariableDefs.obj (CpuTimer2RegsFile)

PieCtrlRegsFile 
*          1    00000ce0    0000001a     UNINITIALIZED
                  00000ce0    0000001a     DSP2833x_GlobalVariableDefs.obj (PieCtrlRegsFile)

PieVectTableFile 
*          1    00000d00    00000100     UNINITIALIZED
                  00000d00    00000100     DSP2833x_GlobalVariableDefs.obj (PieVectTableFile)

DmaRegsFile 
*          1    00001000    000000e0     UNINITIALIZED
                  00001000    000000e0     DSP2833x_GlobalVariableDefs.obj (DmaRegsFile)

McbspaRegsFile 
*          1    00005000    00000025     UNINITIALIZED
                  00005000    00000025     DSP2833x_GlobalVariableDefs.obj (McbspaRegsFile)

McbspbRegsFile 
*          1    00005040    00000025     UNINITIALIZED
                  00005040    00000025     DSP2833x_GlobalVariableDefs.obj (McbspbRegsFile)

ECanaRegsFile 
*          1    00006000    00000034     UNINITIALIZED
                  00006000    00000034     DSP2833x_GlobalVariableDefs.obj (ECanaRegsFile)

ECanaLAMRegsFile 
*          1    00006040    00000040     UNINITIALIZED
                  00006040    00000040     DSP2833x_GlobalVariableDefs.obj (ECanaLAMRegsFile)

ECanaMOTSRegsFile 
*          1    00006080    00000040     UNINITIALIZED
                  00006080    00000040     DSP2833x_GlobalVariableDefs.obj (ECanaMOTSRegsFile)

ECanaMOTORegsFile 
*          1    000060c0    00000040     UNINITIALIZED
                  000060c0    00000040     DSP2833x_GlobalVariableDefs.obj (ECanaMOTORegsFile)

ECanaMboxesFile 
*          1    00006100    00000100     UNINITIALIZED
                  00006100    00000100     DSP2833x_GlobalVariableDefs.obj (ECanaMboxesFile)

ECanbRegsFile 
*          1    00006200    00000034     UNINITIALIZED
                  00006200    00000034     DSP2833x_GlobalVariableDefs.obj (ECanbRegsFile)

ECanbLAMRegsFile 
*          1    00006240    00000040     UNINITIALIZED
                  00006240    00000040     DSP2833x_GlobalVariableDefs.obj (ECanbLAMRegsFile)

ECanbMOTSRegsFile 
*          1    00006280    00000040     UNINITIALIZED
                  00006280    00000040     DSP2833x_GlobalVariableDefs.obj (ECanbMOTSRegsFile)

ECanbMOTORegsFile 
*          1    000062c0    00000040     UNINITIALIZED
                  000062c0    00000040     DSP2833x_GlobalVariableDefs.obj (ECanbMOTORegsFile)

ECanbMboxesFile 
*          1    00006300    00000100     UNINITIALIZED
                  00006300    00000100     DSP2833x_GlobalVariableDefs.obj (ECanbMboxesFile)

EPwm1RegsFile 
*          1    00006800    00000022     UNINITIALIZED
                  00006800    00000022     DSP2833x_GlobalVariableDefs.obj (EPwm1RegsFile)

EPwm2RegsFile 
*          1    00006840    00000022     UNINITIALIZED
                  00006840    00000022     DSP2833x_GlobalVariableDefs.obj (EPwm2RegsFile)

EPwm3RegsFile 
*          1    00006880    00000022     UNINITIALIZED
                  00006880    00000022     DSP2833x_GlobalVariableDefs.obj (EPwm3RegsFile)

EPwm4RegsFile 
*          1    000068c0    00000022     UNINITIALIZED
                  000068c0    00000022     DSP2833x_GlobalVariableDefs.obj (EPwm4RegsFile)

EPwm5RegsFile 
*          1    00006900    00000022     UNINITIALIZED
                  00006900    00000022     DSP2833x_GlobalVariableDefs.obj (EPwm5RegsFile)

EPwm6RegsFile 
*          1    00006940    00000022     UNINITIALIZED
                  00006940    00000022     DSP2833x_GlobalVariableDefs.obj (EPwm6RegsFile)

ECap1RegsFile 
*          1    00006a00    00000020     UNINITIALIZED
                  00006a00    00000020     DSP2833x_GlobalVariableDefs.obj (ECap1RegsFile)

ECap2RegsFile 
*          1    00006a20    00000020     UNINITIALIZED
                  00006a20    00000020     DSP2833x_GlobalVariableDefs.obj (ECap2RegsFile)

ECap3RegsFile 
*          1    00006a40    00000020     UNINITIALIZED
                  00006a40    00000020     DSP2833x_GlobalVariableDefs.obj (ECap3RegsFile)

ECap4RegsFile 
*          1    00006a60    00000020     UNINITIALIZED
                  00006a60    00000020     DSP2833x_GlobalVariableDefs.obj (ECap4RegsFile)

ECap5RegsFile 
*          1    00006a80    00000020     UNINITIALIZED
                  00006a80    00000020     DSP2833x_GlobalVariableDefs.obj (ECap5RegsFile)

ECap6RegsFile 
*          1    00006aa0    00000020     UNINITIALIZED
                  00006aa0    00000020     DSP2833x_GlobalVariableDefs.obj (ECap6RegsFile)

EQep1RegsFile 
*          1    00006b00    00000040     UNINITIALIZED
                  00006b00    00000040     DSP2833x_GlobalVariableDefs.obj (EQep1RegsFile)

EQep2RegsFile 
*          1    00006b40    00000040     UNINITIALIZED
                  00006b40    00000040     DSP2833x_GlobalVariableDefs.obj (EQep2RegsFile)

GpioCtrlRegsFile 
*          1    00006f80    0000002e     UNINITIALIZED
                  00006f80    0000002e     DSP2833x_GlobalVariableDefs.obj (GpioCtrlRegsFile)

GpioDataRegsFile 
*          1    00006fc0    00000020     UNINITIALIZED
                  00006fc0    00000020     DSP2833x_GlobalVariableDefs.obj (GpioDataRegsFile)

GpioIntRegsFile 
*          1    00006fe0    0000000a     UNINITIALIZED
                  00006fe0    0000000a     DSP2833x_GlobalVariableDefs.obj (GpioIntRegsFile)

SysCtrlRegsFile 
*          1    00007010    00000020     UNINITIALIZED
                  00007010    00000020     DSP2833x_GlobalVariableDefs.obj (SysCtrlRegsFile)

SpiaRegsFile 
*          1    00007040    00000010     UNINITIALIZED
                  00007040    00000010     DSP2833x_GlobalVariableDefs.obj (SpiaRegsFile)

SciaRegsFile 
*          1    00007050    00000010     UNINITIALIZED
                  00007050    00000010     DSP2833x_GlobalVariableDefs.obj (SciaRegsFile)

XIntruptRegsFile 
*          1    00007070    00000010     UNINITIALIZED
                  00007070    00000010     DSP2833x_GlobalVariableDefs.obj (XIntruptRegsFile)

AdcRegsFile 
*          1    00007100    0000001e     UNINITIALIZED
                  00007100    0000001e     DSP2833x_GlobalVariableDefs.obj (AdcRegsFile)

ScibRegsFile 
*          1    00007750    00000010     UNINITIALIZED
                  00007750    00000010     DSP2833x_GlobalVariableDefs.obj (ScibRegsFile)

ScicRegsFile 
*          1    00007770    00000010     UNINITIALIZED
                  00007770    00000010     DSP2833x_GlobalVariableDefs.obj (ScicRegsFile)

I2caRegsFile 
*          1    00007900    00000022     UNINITIALIZED
                  00007900    00000022     DSP2833x_GlobalVariableDefs.obj (I2caRegsFile)

CsmPwlFile 
*          1    0033fff8    00000008     UNINITIALIZED
                  0033fff8    00000008     DSP2833x_GlobalVariableDefs.obj (CsmPwlFile)

PartIdRegsFile 
*          1    00380090    00000001     UNINITIALIZED
                  00380090    00000001     DSP2833x_GlobalVariableDefs.obj (PartIdRegsFile)


GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 

address    name
--------   ----
00338000   .text
00339221   C$$EXIT
0033923a   FS$$DIV
003391a5   I$$DIV
003391b6   I$$MOD
00339153   L$$DIV
00339162   L$$MOD
00339170   UL$$DIV
00339177   UL$$MOD
0033873a   _ADCINT_ISR
00380080   _ADC_cal
00000b00   _AdcMirror
00007100   _AdcRegs
00000007   _AddressEeprom
00339029   _ConfigCpuTimer
00338f99   _ConversionFromAscii
00000006   _ConvertedChar
00000860   _CpuTimer0
00000c00   _CpuTimer0Regs
00000850   _CpuTimer1
00000c08   _CpuTimer1Regs
00000858   _CpuTimer2
00000c10   _CpuTimer2Regs
0033fff8   _CsmPwl
00000ae0   _CsmRegs
00338e97   _CsmUnlock
00338668   _DATALOG_ISR
0033885c   _DINTCH1_ISR
00338866   _DINTCH2_ISR
00338870   _DINTCH3_ISR
0033887a   _DINTCH4_ISR
00338884   _DINTCH5_ISR
0033888e   _DINTCH6_ISR
0000801b   _DSP28x_usDelay
00000880   _DevEmuRegs
00338de8   _DisableDog
00338d01   _DisableExtSynchro
00338dc5   _DisableSignalGeneration
00001000   _DmaRegs
003388e8   _ECAN0INTA_ISR
003388fc   _ECAN0INTB_ISR
003388f2   _ECAN1INTA_ISR
00338906   _ECAN1INTB_ISR
003387d0   _ECAP1_INT_ISR
003387da   _ECAP2_INT_ISR
003387e4   _ECAP3_INT_ISR
003387ee   _ECAP4_INT_ISR
003387f8   _ECAP5_INT_ISR
00338802   _ECAP6_INT_ISR
00006040   _ECanaLAMRegs
000060c0   _ECanaMOTORegs
00006080   _ECanaMOTSRegs
00006100   _ECanaMboxes
00006000   _ECanaRegs
00006240   _ECanbLAMRegs
000062c0   _ECanbMOTORegs
00006280   _ECanbMOTSRegs
00006300   _ECanbMboxes
00006200   _ECanbRegs
00006a00   _ECap1Regs
00006a20   _ECap2Regs
00006a40   _ECap3Regs
00006a60   _ECap4Regs
00006a80   _ECap5Regs
00006aa0   _ECap6Regs
0033867c   _EMUINT_ISR
00338794   _EPWM1_INT_ISR
00338758   _EPWM1_TZINT_ISR
0033879e   _EPWM2_INT_ISR
00338762   _EPWM2_TZINT_ISR
003387a8   _EPWM3_INT_ISR
0033876c   _EPWM3_TZINT_ISR
003387b2   _EPWM4_INT_ISR
00338776   _EPWM4_TZINT_ISR
003387bc   _EPWM5_INT_ISR
00338780   _EPWM5_TZINT_ISR
003387c6   _EPWM6_INT_ISR
0033878a   _EPWM6_TZINT_ISR
00006800   _EPwm1Regs
00006840   _EPwm2Regs
00006880   _EPwm3Regs
000068c0   _EPwm4Regs
00006900   _EPwm5Regs
00006940   _EPwm6Regs
0033880c   _EQEP1_INT_ISR
00338816   _EQEP2_INT_ISR
00006b00   _EQep1Regs
00006b40   _EQep2Regs
00338ce1   _EnableExtSynchro
0033919c   _EnableInterrupts
00338db9   _EnableSignalGeneration
00000a80   _FlashRegs
00006f80   _GpioCtrlRegs
00006fc0   _GpioDataRegs
00006fe0   _GpioIntRegs
00000880   _HalfSinus_LookUpTable
00000080   _HalfSinus_ScaledLookUpTable
00338898   _I2CINT1A_ISR
003388a2   _I2CINT2A_ISR
00007900   _I2caRegs
00338690   _ILLEGAL_ISR
00338654   _INT13_ISR
0033865e   _INT14_ISR
00338ff0   _InitCpuTimers
00008000   _InitFlash
00339253   _InitI2C
00339254   _InitI2CGpio
00338e3c   _InitPeripheralClocks
0033917d   _InitPieCtrl
003391e8   _InitPieVectTable
00338df0   _InitPll
003390c5   _InitSci
003390c6   _InitSciGpio
003390cd   _InitSciaGpio
003390e3   _InitScibGpio
003390f7   _InitScicGpio
00338dd5   _InitSysCtrl
00338beb   _InitXintf
00338c87   _InitXintf16Gpio
00338c40   _InitXintf32Gpio
0000002a   _IntermediaryPlateauDuration
00000021   _InvalidCharReceived
0033894c   _LUF_ISR
00338942   _LVF_ISR
0000000a   _LowChar
00338848   _MRINTA_ISR
00338834   _MRINTB_ISR
00338852   _MXINTA_ISR
0033883e   _MXINTB_ISR
00005000   _McbspaRegs
00005040   _McbspbRegs
0033926a   _MemCopy
003389bf   _MyInitXintf
00338686   _NMI_ISR
00338956   _PIE_RESERVED
00380090   _PartIdRegs
00000ce0   _PieCtrlRegs
00000d00   _PieVectTable
00339b44   _PieVectTableInit
00338672   _RTOSINT_ISR
0032001f   _RamfuncsLoadEnd
00320000   _RamfuncsLoadStart
00008000   _RamfuncsRunStart
0000001b   _ReadBuffer
00000008   _ReceivedChar
00338fcc   _ResetEeprom
00338d87   _ResetSinus
00338d19   _ResetTrapeze
003388c0   _SCIRXINTA_ISR
003388d4   _SCIRXINTB_ISR
003388ac   _SCIRXINTC_ISR
003388ca   _SCITXINTA_ISR
003388de   _SCITXINTB_ISR
003388b6   _SCITXINTC_ISR
00338712   _SEQ1INT_ISR
0033871c   _SEQ2INT_ISR
00338820   _SPIRXINTA_ISR
0033882a   _SPITXINTA_ISR
00007050   _SciaRegs
00007750   _ScibRegs
00007770   _ScicRegs
00338dde   _ServiceDog
00338af2   _SignalGeneration
00338000   _SpiInterrupt
00007040   _SpiaRegs
00007010   _SysCtrlRegs
00338744   _TINT0_ISR
003386f4   _USER10_ISR
003386fe   _USER11_ISR
00338708   _USER12_ISR
0033869a   _USER1_ISR
003386a4   _USER2_ISR
003386ae   _USER3_ISR
003386b8   _USER4_ISR
003386c2   _USER5_ISR
003386cc   _USER6_ISR
003386d6   _USER7_ISR
003386e0   _USER8_ISR
003386ea   _USER9_ISR
00338ec8   _UartRxInterrupt
0033874e   _WAKEINT_ISR
00338f7f   _WriteOneByteToEeprom
00338726   _XINT1_ISR
00338730   _XINT2_ISR
00338910   _XINT3_ISR
0033891a   _XINT4_ISR
00338924   _XINT5_ISR
0033892e   _XINT6_ISR
00338938   _XINT7_ISR
00007070   _XIntruptRegs
00000b20   _XintfRegs
00000600   __STACK_END
00000200   __STACK_SIZE
00000001   __TI_args_main
ffffffff   ___binit__
ffffffff   ___c_args__
00339290   ___cinit__
00339290   ___etext__
ffffffff   ___pinit__
00338000   ___text__
00339208   __args_main
0000086c   __cleanup_ptr
0000086e   __dtors_ptr
0000086a   __lock
00339287   __nop
00339283   __register_lock
0033927f   __register_unlock
00000400   __stack
00000868   __unlock
00339221   _abort
00000023   _address
00000025   _angle_max
0000001d   _angle_min
0033910d   _c_int00
0000000f   _check_sum
00000010   _check_sum_HIGH
0000000e   _check_sum_LOW
00000024   _current_dao
0000001f   _current_increment_value
0000001e   _current_plateau_duration
00000022   _current_plateau_value
00000026   _current_segment
00338f66   _delay_usec
0000000d   _dummy_interrupt
00000872   _dummy_read
00339223   _exit
00000019   _increment
00338a1c   _init
0033896a   _initExtInterrupt
00338987   _initI2C
00338999   _initSCI
00000870   _k
0000002c   _magnitude_double
00000018   _magnitude_int
003391c7   _main
00000000   _mantissa_exponent
00000001   _mantissa_value
00000012   _max_segment
00000873   _mirror_dao
00000028   _msg
00000054   _plateau_duration
00000020   _plateau_duration_counter
0000002e   _plateau_value
0000000b   _received_data
00000014   _received_word
00000002   _reg0
00000004   _reg1
00000003   _reg2
00000005   _reg3
00000011   _reg4
00000013   _reg5
00000015   _reg_out
00338960   _rsvd_ISR
00000016   _sample_number
00338fb7   _scia_msg
00338fab   _scia_xmit
00000027   _segment_counter
00000017   _signal_state
00000009   _slope_counter
0000005e   _slope_counter_limit
00000040   _slope_increment
0000004a   _slope_time_interval
0000001c   _software_version
0000001a   _timer_period
0000000c   _value
00000871   _x
00339064   _xint1_isr
ffffffff   binit
00339290   cinit
0033fff6   code_start
00339290   etext
ffffffff   pinit


GLOBAL SYMBOLS: SORTED BY Symbol Address 

address    name
--------   ----
00000000   _mantissa_exponent
00000001   __TI_args_main
00000001   _mantissa_value
00000002   _reg0
00000003   _reg2
00000004   _reg1
00000005   _reg3
00000006   _ConvertedChar
00000007   _AddressEeprom
00000008   _ReceivedChar
00000009   _slope_counter
0000000a   _LowChar
0000000b   _received_data
0000000c   _value
0000000d   _dummy_interrupt
0000000e   _check_sum_LOW
0000000f   _check_sum
00000010   _check_sum_HIGH
00000011   _reg4
00000012   _max_segment
00000013   _reg5
00000014   _received_word
00000015   _reg_out
00000016   _sample_number
00000017   _signal_state
00000018   _magnitude_int
00000019   _increment
0000001a   _timer_period
0000001b   _ReadBuffer
0000001c   _software_version
0000001d   _angle_min
0000001e   _current_plateau_duration
0000001f   _current_increment_value
00000020   _plateau_duration_counter
00000021   _InvalidCharReceived
00000022   _current_plateau_value
00000023   _address
00000024   _current_dao
00000025   _angle_max
00000026   _current_segment
00000027   _segment_counter
00000028   _msg
0000002a   _IntermediaryPlateauDuration
0000002c   _magnitude_double
0000002e   _plateau_value
00000040   _slope_increment
0000004a   _slope_time_interval
00000054   _plateau_duration
0000005e   _slope_counter_limit
00000080   _HalfSinus_ScaledLookUpTable
00000200   __STACK_SIZE
00000400   __stack
00000600   __STACK_END
00000850   _CpuTimer1
00000858   _CpuTimer2
00000860   _CpuTimer0
00000868   __unlock
0000086a   __lock
0000086c   __cleanup_ptr
0000086e   __dtors_ptr
00000870   _k
00000871   _x
00000872   _dummy_read
00000873   _mirror_dao
00000880   _DevEmuRegs
00000880   _HalfSinus_LookUpTable
00000a80   _FlashRegs
00000ae0   _CsmRegs
00000b00   _AdcMirror
00000b20   _XintfRegs
00000c00   _CpuTimer0Regs
00000c08   _CpuTimer1Regs
00000c10   _CpuTimer2Regs
00000ce0   _PieCtrlRegs
00000d00   _PieVectTable
00001000   _DmaRegs
00005000   _McbspaRegs
00005040   _McbspbRegs
00006000   _ECanaRegs
00006040   _ECanaLAMRegs
00006080   _ECanaMOTSRegs
000060c0   _ECanaMOTORegs
00006100   _ECanaMboxes
00006200   _ECanbRegs
00006240   _ECanbLAMRegs
00006280   _ECanbMOTSRegs
000062c0   _ECanbMOTORegs
00006300   _ECanbMboxes
00006800   _EPwm1Regs
00006840   _EPwm2Regs
00006880   _EPwm3Regs
000068c0   _EPwm4Regs
00006900   _EPwm5Regs
00006940   _EPwm6Regs
00006a00   _ECap1Regs
00006a20   _ECap2Regs
00006a40   _ECap3Regs
00006a60   _ECap4Regs
00006a80   _ECap5Regs
00006aa0   _ECap6Regs
00006b00   _EQep1Regs
00006b40   _EQep2Regs
00006f80   _GpioCtrlRegs
00006fc0   _GpioDataRegs
00006fe0   _GpioIntRegs
00007010   _SysCtrlRegs
00007040   _SpiaRegs
00007050   _SciaRegs
00007070   _XIntruptRegs
00007100   _AdcRegs
00007750   _ScibRegs
00007770   _ScicRegs
00007900   _I2caRegs
00008000   _InitFlash
00008000   _RamfuncsRunStart
0000801b   _DSP28x_usDelay
00320000   _RamfuncsLoadStart
0032001f   _RamfuncsLoadEnd
00338000   .text
00338000   _SpiInterrupt
00338000   ___text__
00338654   _INT13_ISR
0033865e   _INT14_ISR
00338668   _DATALOG_ISR
00338672   _RTOSINT_ISR
0033867c   _EMUINT_ISR
00338686   _NMI_ISR
00338690   _ILLEGAL_ISR
0033869a   _USER1_ISR
003386a4   _USER2_ISR
003386ae   _USER3_ISR
003386b8   _USER4_ISR
003386c2   _USER5_ISR
003386cc   _USER6_ISR
003386d6   _USER7_ISR
003386e0   _USER8_ISR
003386ea   _USER9_ISR
003386f4   _USER10_ISR
003386fe   _USER11_ISR
00338708   _USER12_ISR
00338712   _SEQ1INT_ISR
0033871c   _SEQ2INT_ISR
00338726   _XINT1_ISR
00338730   _XINT2_ISR
0033873a   _ADCINT_ISR
00338744   _TINT0_ISR
0033874e   _WAKEINT_ISR
00338758   _EPWM1_TZINT_ISR
00338762   _EPWM2_TZINT_ISR
0033876c   _EPWM3_TZINT_ISR
00338776   _EPWM4_TZINT_ISR
00338780   _EPWM5_TZINT_ISR
0033878a   _EPWM6_TZINT_ISR
00338794   _EPWM1_INT_ISR
0033879e   _EPWM2_INT_ISR
003387a8   _EPWM3_INT_ISR
003387b2   _EPWM4_INT_ISR
003387bc   _EPWM5_INT_ISR
003387c6   _EPWM6_INT_ISR
003387d0   _ECAP1_INT_ISR
003387da   _ECAP2_INT_ISR
003387e4   _ECAP3_INT_ISR
003387ee   _ECAP4_INT_ISR
003387f8   _ECAP5_INT_ISR
00338802   _ECAP6_INT_ISR
0033880c   _EQEP1_INT_ISR
00338816   _EQEP2_INT_ISR
00338820   _SPIRXINTA_ISR
0033882a   _SPITXINTA_ISR
00338834   _MRINTB_ISR
0033883e   _MXINTB_ISR
00338848   _MRINTA_ISR
00338852   _MXINTA_ISR
0033885c   _DINTCH1_ISR
00338866   _DINTCH2_ISR
00338870   _DINTCH3_ISR
0033887a   _DINTCH4_ISR
00338884   _DINTCH5_ISR
0033888e   _DINTCH6_ISR
00338898   _I2CINT1A_ISR
003388a2   _I2CINT2A_ISR
003388ac   _SCIRXINTC_ISR
003388b6   _SCITXINTC_ISR
003388c0   _SCIRXINTA_ISR
003388ca   _SCITXINTA_ISR
003388d4   _SCIRXINTB_ISR
003388de   _SCITXINTB_ISR
003388e8   _ECAN0INTA_ISR
003388f2   _ECAN1INTA_ISR
003388fc   _ECAN0INTB_ISR
00338906   _ECAN1INTB_ISR
00338910   _XINT3_ISR
0033891a   _XINT4_ISR
00338924   _XINT5_ISR
0033892e   _XINT6_ISR
00338938   _XINT7_ISR
00338942   _LVF_ISR
0033894c   _LUF_ISR
00338956   _PIE_RESERVED
00338960   _rsvd_ISR
0033896a   _initExtInterrupt
00338987   _initI2C
00338999   _initSCI
003389bf   _MyInitXintf
00338a1c   _init
00338af2   _SignalGeneration
00338beb   _InitXintf
00338c40   _InitXintf32Gpio
00338c87   _InitXintf16Gpio
00338ce1   _EnableExtSynchro
00338d01   _DisableExtSynchro
00338d19   _ResetTrapeze
00338d87   _ResetSinus
00338db9   _EnableSignalGeneration
00338dc5   _DisableSignalGeneration
00338dd5   _InitSysCtrl
00338dde   _ServiceDog
00338de8   _DisableDog
00338df0   _InitPll
00338e3c   _InitPeripheralClocks
00338e97   _CsmUnlock
00338ec8   _UartRxInterrupt
00338f66   _delay_usec
00338f7f   _WriteOneByteToEeprom
00338f99   _ConversionFromAscii
00338fab   _scia_xmit
00338fb7   _scia_msg
00338fcc   _ResetEeprom
00338ff0   _InitCpuTimers
00339029   _ConfigCpuTimer
00339064   _xint1_isr
003390c5   _InitSci
003390c6   _InitSciGpio
003390cd   _InitSciaGpio
003390e3   _InitScibGpio
003390f7   _InitScicGpio
0033910d   _c_int00
00339153   L$$DIV
00339162   L$$MOD
00339170   UL$$DIV
00339177   UL$$MOD
0033917d   _InitPieCtrl
0033919c   _EnableInterrupts
003391a5   I$$DIV
003391b6   I$$MOD
003391c7   _main
003391e8   _InitPieVectTable
00339208   __args_main
00339221   C$$EXIT
00339221   _abort
00339223   _exit
0033923a   FS$$DIV
00339253   _InitI2C
00339254   _InitI2CGpio
0033926a   _MemCopy
0033927f   __register_unlock
00339283   __register_lock
00339287   __nop
00339290   ___cinit__
00339290   ___etext__
00339290   cinit
00339290   etext
00339b44   _PieVectTableInit
0033fff6   code_start
0033fff8   _CsmPwl
00380080   _ADC_cal
00380090   _PartIdRegs
ffffffff   ___binit__
ffffffff   ___c_args__
ffffffff   ___pinit__
ffffffff   binit
ffffffff   pinit

[272 symbols]

0 Gautam Iyer over 10 years ago in reply to Christian Rod

Guru 192875 points

Christian Rod said:

I tried to reduce to 0x200. The output is the same.

I join the .map. Maybe this can help.

Looking at your map file, it seems there's lot of unused memory. Please check you main file for any irrelevant linker data that might be linking incorrectly. Refer F28335_flash example for the necessary data.

Regards,

Gautam

0 Christian Rod over 10 years ago in reply to Gautam Iyer

Prodigy 210 points

I am more and more sorry but I have checked my main file the whole morning (with other colleague qualified in C programming), comparing it to the main file issued from the mentionned exmaple (from which I started my project, as you suggested) but I can't see any issue.

The philosophy I have followed is the same as the one I used with the C28346: defining all the variable in the main file and using the extern keyword in the other files (where my ISR and functions are coded). Is this wrong? I have done that for more that 5years now, for many projects on TI devices (and other) and never encountered a problem?

I have a littledsoubt about the InitFlash() function that should be in the RAM (as indicated in commentaries). I understand very weel that this function cannot be in Flash since it acts on it. Nevertheless, it seems to me that it is remapped in the RAM since I call the MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);

I really thank you for the time you spent answering me but I fear I need a little more :( I join to this post my main file and the F28335.cmd file I use. Many, you will be able to spot the issue.

5873.Example_2833xFlash.c

// TI File $Revision: /main/2 $
// Checkin $Date: July 30, 2009   18:44:57 $
//###########################################################################
//
// FILE:    Example_2833xFlash.c
//
// TITLE:   DSP2833x ePWM Timer Interrupt From Flash Example.
//
// ASSUMPTIONS:
//
//    This program requires the DSP2833x header files.
//
//    As supplied, this project is configured for "boot to FLASH"
//    operation.  The 2833x Boot Mode table is shown below.
//    For information on configuring the boot mode of an eZdsp,
//    please refer to the documentation included with the eZdsp,
//
//       $Boot_Table:
//
//         GPIO87   GPIO86     GPIO85   GPIO84
//          XA15     XA14       XA13     XA12
//           PU       PU         PU       PU
//        ==========================================
//            1        1          1        1    Jump to Flash <- "boot to Flash"
//            1        1          1        0    SCI-A boot
//            1        1          0        1    SPI-A boot
//            1        1          0        0    I2C-A boot
//            1        0          1        1    eCAN-A boot
//            1        0          1        0    McBSP-A boot
//            1        0          0        1    Jump to XINTF x16
//            1        0          0        0    Jump to XINTF x32
//            0        1          1        1    Jump to OTP
//            0        1          1        0    Parallel GPIO I/O boot
//            0        1          0        1    Parallel XINTF boot
//            0        1          0        0    Jump to SARAM
//            0        0          1        1    Branch to check boot mode
//            0        0          1        0    Boot to flash, bypass ADC cal
//            0        0          0        1    Boot to SARAM, bypass ADC cal
//            0        0          0        0    Boot to SCI-A, bypass ADC cal
//                                              Boot_Table_End$
//
// DESCRIPTION:
//
//    This example runs the ePWM interrupt example from flash.
//
//    1) Build the project
//    2) Flash the .out file into the device.
//    3) Set the hardware jumpers to boot to Flash
//    4) Load the project, (in CCSv4 - loads directly to Flash)
//       and watch variables in watch window while running.
//
//    Steps that were taken to convert the ePWM example from RAM
//    to Flash execution:
//
//    - Change the linker cmd file to reflect the flash memory map.
//    - Make sure any initialized sections are mapped to Flash.
//      In SDFlash utility this can be checked by the View->Coff/Hex
//      status utility. Any section marked as "load" should be
//      allocated to Flash.
//    - Make sure there is a branch instruction from the entry to Flash
//      at 0x33FFF6 to the beginning of code execution. This example
//      uses the DSP2833x_CodeStartBranch.asm file to accomplish this.
//    - Set boot mode Jumpers to "boot to Flash"
//    - For best performance from the flash, modify the waitstates
//      and enable the flash pipeline as shown in this example.
//      Note: any code that manipulates the flash waitstate and pipeline
//      control must be run from RAM. Thus these functions are located
//      in their own memory section called ramfuncs.
//
//    - NOTE: this example runs on the 28335 device. To run the example
//      on other 2833x device derivatives, change out the F28335.cmd linker
//      command file with the desired device linker command file.
//
//
//    ePwm1 Interrupt will run from RAM and puts the flash into sleep mode
//    ePwm2 Interrupt will run from RAM and puts the flash into standby mode
//    ePWM3 Interrupt will run from FLASH
//
//    As supplied:
//
//    All timers have the same period
//    The timers are started sync'ed
//    An interrupt is taken on a zero event for each ePWM timer
//
//       ePWM1: takes an interrupt every event
//       ePWM2: takes an interrupt every 2nd event
//       ePWM3: takes an interrupt every 3rd event
//
//    Thus the Interrupt count for ePWM1, ePWM4-ePWM6 should be equal
//    The interrupt count for ePWM2 should be about half that of ePWM1
//    and the interrupt count for ePWM3 should be about 1/3 that of ePWM1
//
//          Watch Variables:
//                 EPwm1TimerIntCount
//                 EPwm2TimerIntCount
//                 EPwm3TimerIntCount
//
//                 Toggle GPIO32 while in the background loop.
//
//###########################################################################
// $TI Release: 2833x/2823x Header Files V1.32 $
// $Release Date: June 28, 2010 $
//###########################################################################


#include "DSP28x_Project.h"     	// Device Headerfile and Examples Include File
#include "init.h"					//"Configuration/init.h"
//#include "CommunicationCPU/SpiInterrupt.h"
//#include "SignalsGeneration.h"		// "SignalsGeneration/SignalsGeneration.h"
#include "SignalsFunctions.h"		//"SignalsGeneration/SignalsFunctions.h"
//#include "BootLoader/BootLoaderFunctions.h"

//-------------------------------------------------------------------------------------------------------------
//------------------------------------------- Variables -------------------------------------------------------
//-------------------------------------------------------------------------------------------------------------

enum type_signal_state signal_state = sinus;					// Variable that describes the current state of the trapeze

// Sinus
int sample_number = 0;											// Number of the current sample of the look-up table
int increment = 1;												// Increment in the look-up table between to samples
unsigned int magnitude_int = 0;									// Magnitude of the half-sinus (20 mA = 65535)
double magnitude_double = 0.5;									// Magnitude of the half-sinus (20 mA = 1.0)
int timer_period = 0;											// Timer 0 period for the sinus generation
extern unsigned int HalfSinus_LookUpTable [2000];				// Look-up table for a half sinus with 2000 points
unsigned int HalfSinus_ScaledLookUpTable [2000];				// Scaled Look-up table for a half sinus with 2000 points
int angle_min = 889;											// lower angular limit for the hand-shake signal
int angle_max = 1111;											// upper angular limit for the hand-shake signal

// Trapeze
int current_dao = 0;											// Integer to memorize the previous value of the Dynamic Analog Output (DAO)
unsigned int segment_counter=0;                        			// Number of the currently generated trapeze segment
unsigned int current_segment;                        			// Number of the currently generated trapeze segment
int current_increment_value=0;                 					// Increment of the currently generated segment
unsigned int current_plateau_duration=0;          				// Number of interrupt to generate the current plateau
unsigned int plateau_duration_counter=0;						// Count the number of interrupt passed to generate the plateau
unsigned int current_plateau_value=0;          					// Value of the plateau of the currently generated segment
//unsigned int plateau_max_duration[10]={0};       				// Table for the maximal duration of a plateau
int slope_increment[10]={0};       								// Table for the increments during the slope
unsigned int plateau_value[10]={0};								// Table for the value of the plateau
unsigned int plateau_duration[10]={0};    				   		// Table for the duration of a plateau
unsigned int slope_time_interval[10]={100};						// Table for the period of timer0 interrupt
unsigned int slope_counter_limit[10]={0};						// Table for the limit of the slope increment counter
unsigned int slope_counter = 0;									// Counter for the slope duration
unsigned int max_segment = 9;									// maximum number of segment
int mantissa_value = 0;											// For the translation from the mantissa format
int mantissa_exponent = 0;										// Idem

// Communication - "DSP-registers"
unsigned int reg0 = 0;											// For sinus <=> Magnitude on 16 bits, For trapeze <=> value of the plateau
unsigned int reg1 = 0;											// For sinus <=> increment (1,2,4,5,8 or 10), For trapeze <=> period of timer0
int reg2 = 0;													// For sinus <=> period of timer zero, For trapeze, increment between to samples
int reg3 = 0;													// Only for trapeze <=> plateau duration (mantissa format: 12 bits for value, 4 bits for exponent)
int reg4 = 0;													// Meaning of the value in the other register
int reg5 = 0;													// For both types: writting a value in this register a is soft synchro
int reg_out = 0;												// Value to send to the uC (0x55 <=> a curve is under generation, 0xAA, a curve is ready to be generated)
char received_word = 0;											// Number of received bytes for the current message (address + value)
int address = 0;												// Received address
int value = 0;													// Received value
int received_data = 0;											// "raw" received data
int dummy_interrupt = 1;										// for differenciate the first false interrupt
long IntermediaryPlateauDuration = 0;							// Intermediary variable to compute the plateau duration
int check_sum  = 0;												// check sum to verify the value in all registers at once
int check_sum_LOW = 0;											// intermediary variable
int check_sum_HIGH = 0;											// intermediary variable

// Communication UART
char LowChar = 0;												// 0 if the current character is the lower byte
																// 1 if the current character is the upper byte
char ReceivedChar = 0;											// The received 8-bit character
char ConvertedChar = 0;											// Converted value from Ascii
int AddressEeprom = 0;											// Address in the eeprom
char InvalidCharReceived = 0;									// Check if an invalid character has been received
char *msg;														// message to be send to the PC
char ReadBuffer = 0;											// Value of the buffer at the beginning of the interrupt


// General
int software_version = 10;										// software version, to be read 1.0
																// !!!! If modified, please change line 103 of main. !!!!!


/*

// Configure which ePWM timer interrupts are enabled at the PIE level:
// 1 = enabled,  0 = disabled
#define PWM1_INT_ENABLE  1
#define PWM2_INT_ENABLE  1
#define PWM3_INT_ENABLE  1

// Configure the period for each timer
#define PWM1_TIMER_TBPRD   0x1FFF
#define PWM2_TIMER_TBPRD   0x1FFF
#define PWM3_TIMER_TBPRD   0x1FFF

// Make this long enough so that we can see an LED toggle
#define DELAY 1000000L

// Functions that will be run from RAM need to be assigned to
// a different section.  This section will then be mapped using
// the linker cmd file.
#pragma CODE_SECTION(epwm1_timer_isr, "ramfuncs");
#pragma CODE_SECTION(epwm2_timer_isr, "ramfuncs");

// Prototype statements for functions found within this file.
interrupt void epwm1_timer_isr(void);
interrupt void epwm2_timer_isr(void);
interrupt void epwm3_timer_isr(void);
void InitEPwmTimer(void);

// Global variables used in this example
Uint32  EPwm1TimerIntCount;
Uint32  EPwm2TimerIntCount;
Uint32  EPwm3TimerIntCount;
Uint32  LoopCount;

*/

// These are defined by the linker (see F28335.cmd)
extern Uint16 RamfuncsLoadStart;
extern Uint16 RamfuncsLoadEnd;
extern Uint16 RamfuncsRunStart;

void main(void)
{

	//init();									// Initialization functions

/*

// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2833x_SysCtrl.c file.
   InitSysCtrl();

// Step 2. Initalize GPIO:
// This example function is found in the DSP2833x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio();  // Skipped for this example


// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
   DINT;

// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
   InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:
   IER = 0x0000;
   IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
   InitPieVectTable();

// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
   EALLOW;  // This is needed to write to EALLOW protected registers
   PieVectTable.EPWM1_INT = &epwm1_timer_isr;
   PieVectTable.EPWM2_INT = &epwm2_timer_isr;
   PieVectTable.EPWM3_INT = &epwm3_timer_isr;
   EDIS;    // This is needed to disable write to EALLOW protected registers

// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2833x_InitPeripherals.c
// InitPeripherals();  // Not required for this example
   InitEPwmTimer();    // For this example, only initialize the ePWM Timers

// Step 5. User specific code, enable interrupts:

 */

// Copy time critical code and Flash setup code to RAM
// This includes the following ISR functions: epwm1_timer_isr(), epwm2_timer_isr()
// epwm3_timer_isr and and InitFlash();
// The  RamfuncsLoadStart, RamfuncsLoadEnd, and RamfuncsRunStart
// symbols are created by the linker. Refer to the F28335.cmd file.
   MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);

// Call Flash Initialization to setup flash waitstates
// This function must reside in RAM
   InitFlash();

/*

// Initalize counters:
   EPwm1TimerIntCount = 0;
   EPwm2TimerIntCount = 0;
   EPwm3TimerIntCount = 0;
   LoopCount = 0;

// Enable CPU INT3 which is connected to EPWM1-3 INT:
   IER |= M_INT3;

// Enable EPWM INTn in the PIE: Group 3 interrupt 1-3
   PieCtrlRegs.PIEIER3.bit.INTx1 = PWM1_INT_ENABLE;
   PieCtrlRegs.PIEIER3.bit.INTx2 = PWM2_INT_ENABLE;
   PieCtrlRegs.PIEIER3.bit.INTx3 = PWM3_INT_ENABLE;

// Enable global Interrupts and higher priority real-time debug events:
   EINT;   // Enable Global interrupt INTM
   ERTM;   // Enable Global realtime interrupt DBGM

// Step 6. IDLE loop. Just sit and loop forever (optional):
   EALLOW;
   GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 0;
   GpioCtrlRegs.GPBDIR.bit.GPIO32 = 1;
   EDIS;

   for(;;)
   {
       // This loop will be interrupted, so the overall
       // delay between pin toggles will be longer.
       DELAY_US(DELAY);
       LoopCount++;
       GpioDataRegs.GPBTOGGLE.bit.GPIO32 = 1;
   }

 */

	SpiaRegs.SPITXBUF = software_version;	// put the software version in the transmit buffer of the SPId

	GpioDataRegs.GPASET.bit.GPIO21 = 1; 	// Turn the green led on to show the DSP has booted correctly...

	*DynamicAnalogOutput = 0xFFFF;			// init of the dynamic output to 0 (inverted polarity in hardware)
											// Allows the dynamic output to be 0 during the DSP start-up

	// Check if the DSP is on the UART bus
//	msg = "\r\nDSP present on the UART bus: version 1.0 \n\0";
//	scia_msg(msg);

	ResetTrapeze();							// init the different parameter for the trapeze
	ResetSinus();							// init the different parameter for the sinus

	//------------------------ BEGIN OF DEBUG ---------------------------------------------------
	//ResetEeprom();							// reset the eeprom
	//------------------------ END OF DEBUG ------------------------------------------------------------

	// Beginning of the infinite loop
	while(1)
	{

	}

	// Should never reach this point


}

/*
void InitEPwmTimer()
{

   EALLOW;
   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;      // Stop all the TB clocks
   EDIS;

   // Setup Sync
   EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through
   EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through
   EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through

   // Allow each timer to be sync'ed

   EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
   EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE;
   EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE;

   EPwm1Regs.TBPHS.half.TBPHS = 100;
   EPwm2Regs.TBPHS.half.TBPHS = 200;
   EPwm3Regs.TBPHS.half.TBPHS = 300;

   EPwm1Regs.TBPRD = PWM1_TIMER_TBPRD;
   EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;    // Count up
   EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     // Select INT on Zero event
   EPwm1Regs.ETSEL.bit.INTEN = PWM1_INT_ENABLE;  // Enable INT
   EPwm1Regs.ETPS.bit.INTPRD = ET_1ST;           // Generate INT on 1st event


   EPwm2Regs.TBPRD = PWM2_TIMER_TBPRD;
   EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;     // Count up
   EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;      // Enable INT on Zero event
   EPwm2Regs.ETSEL.bit.INTEN = PWM2_INT_ENABLE;   // Enable INT
   EPwm2Regs.ETPS.bit.INTPRD = ET_2ND;            // Generate INT on 2nd event


   EPwm3Regs.TBPRD = PWM3_TIMER_TBPRD;
   EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;     // Count up
   EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;      // Enable INT on Zero event
   EPwm3Regs.ETSEL.bit.INTEN = PWM3_INT_ENABLE;   // Enable INT
   EPwm3Regs.ETPS.bit.INTPRD = ET_3RD;            // Generate INT on 3rd event

   EALLOW;
   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;         // Start all the timers synced
   EDIS;


}

// This ISR MUST be executed from RAM as it will put the Flash into Sleep
// Interrupt routines uses in this example:
interrupt void epwm1_timer_isr(void)
{

   // Put the Flash to sleep
   FlashRegs.FPWR.bit.PWR = FLASH_SLEEP;

   EPwm1TimerIntCount++;

   // Clear INT flag for this timer
   EPwm1Regs.ETCLR.bit.INT = 1;

   // Acknowledge this interrupt to receive more interrupts from group 3
   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}

// This ISR MUST be executed from RAM as it will put the Flash into Standby
interrupt void epwm2_timer_isr(void)
{
   EPwm2TimerIntCount++;

    // Put the Flash into standby
    FlashRegs.FPWR.bit.PWR = FLASH_STANDBY;

   // Clear INT flag for this timer
   EPwm2Regs.ETCLR.bit.INT = 1;

   // Acknowledge this interrupt to receive more interrupts from group 3
   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}

interrupt void epwm3_timer_isr(void)
{
   Uint16 i;

   EPwm3TimerIntCount++;

    // Short Delay to simulate some ISR Code
    for(i = 1; i < 0x01FF; i++) {}

   // Clear INT flag for this timer
   EPwm3Regs.ETCLR.bit.INT = 1;

   // Acknowledge this interrupt to receive more interrupts from group 3
   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}

*/


//===========================================================================
// No more.
//===========================================================================

8267.F28335CMD.txt

/*
// TI File $Revision: /main/10 $
// Checkin $Date: July 9, 2008   13:43:56 $
//###########################################################################
//
// FILE:	F28335.cmd
//
// TITLE:	Linker Command File For F28335 Device
//
//###########################################################################
// $TI Release: 2833x/2823x Header Files V1.32 $
// $Release Date: June 28, 2010 $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file, 
// add the header linker command file directly to the project. 
// The header linker command file is required to link the
// peripheral structures to the proper locations within 
// the memory map.
//
// The header linker files are found in <base>\DSP2833x_Headers\cmd
//   
// For BIOS applications add:      DSP2833x_Headers_BIOS.cmd
// For nonBIOS applications add:   DSP2833x_Headers_nonBIOS.cmd    
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the 
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper 
// locations within the memory map                                    */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP2833x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l DSP2833x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the
   library search path under project->build options, linker tab, 
   library search path (-i).
/*========================================================= */

/* Define the memory block start/length for the F28335  
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

    Notes: 
          Memory blocks on F28335 are uniform (ie same
          physical memory) in both PAGE 0 and PAGE 1.  
          That is the same memory region should not be
          defined for both PAGE 0 and PAGE 1.
          Doing so will result in corruption of program 
          and/or data. 
          
          L0/L1/L2 and L3 memory blocks are mirrored - that is
          they can be accessed in high memory or low memory.
          For simplicity only one instance is used in this
          linker file. 
          
          Contiguous SARAM memory blocks can be combined 
          if required to create a larger memory block. 
 */


MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   ZONE0       : origin = 0x004000, length = 0x001000     /* XINTF zone 0 */
   RAML0       : origin = 0x008000, length = 0x001000     /* on-chip RAM block L0 */
   RAML1       : origin = 0x009000, length = 0x001000     /* on-chip RAM block L1 */
   RAML2       : origin = 0x00A000, length = 0x001000     /* on-chip RAM block L2 */
   RAML3       : origin = 0x00B000, length = 0x001000     /* on-chip RAM block L3 */
   ZONE6       : origin = 0x0100000, length = 0x100000    /* XINTF zone 6 */ 
   ZONE7A      : origin = 0x0200000, length = 0x00FC00    /* XINTF zone 7 - program space */ 
   FLASHH      : origin = 0x300000, length = 0x008000     /* on-chip FLASH */
   FLASHG      : origin = 0x308000, length = 0x008000     /* on-chip FLASH */
   FLASHF      : origin = 0x310000, length = 0x008000     /* on-chip FLASH */
   FLASHE      : origin = 0x318000, length = 0x008000     /* on-chip FLASH */
   FLASHD      : origin = 0x320000, length = 0x008000     /* on-chip FLASH */
   FLASHC      : origin = 0x328000, length = 0x008000     /* on-chip FLASH */
   FLASHA      : origin = 0x338000, length = 0x007F80     /* on-chip FLASH */
   CSM_RSVD    : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x33FFF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL     : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
   OTP         : origin = 0x380400, length = 0x000400     /* on-chip OTP */
   ADC_CAL     : origin = 0x380080, length = 0x000009     /* ADC_cal function in Reserved memory */
   
   IQTABLES    : origin = 0x3FE000, length = 0x000b50     /* IQ Math Tables in Boot ROM */
   IQTABLES2   : origin = 0x3FEB50, length = 0x00008c     /* IQ Math Tables in Boot ROM */  
   FPUTABLES   : origin = 0x3FEBDC, length = 0x0006A0     /* FPU Tables in Boot ROM */
   ROM         : origin = 0x3FF27C, length = 0x000D44     /* Boot ROM */        
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */
   
   BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
   RAMM0       : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
   RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAML4       : origin = 0x00C000, length = 0x001000     /* on-chip RAM block L1 */
   RAML5       : origin = 0x00D000, length = 0x001000     /* on-chip RAM block L1 */
   RAML6       : origin = 0x00E000, length = 0x001000     /* on-chip RAM block L1 */
   RAML7       : origin = 0x00F000, length = 0x001000     /* on-chip RAM block L1 */
   ZONE7B      : origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */
   FLASHB      : origin = 0x330000, length = 0x008000     /* on-chip FLASH */
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/ 
 
SECTIONS
{
 
   /* Allocate program areas: */
   .cinit              : > FLASHA      PAGE = 0
   .pinit              : > FLASHA,     PAGE = 0
   .text               : > FLASHA      PAGE = 0
   codestart           : > BEGIN       PAGE = 0
   ramfuncs            : LOAD = FLASHD, 
                         RUN = RAML0, 
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   csmpasswds          : > CSM_PWL     PAGE = 0
   csm_rsvd            : > CSM_RSVD    PAGE = 0
   
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM1       PAGE = 1
   .ebss               : > RAML4       PAGE = 1
   .esysmem            : > RAMM1       PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA      PAGE = 0
   .switch             : > FLASHA      PAGE = 0      

   /* Allocate IQ math areas: */
   IQmath              : > FLASHC      PAGE = 0                  /* Math Code */
   IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD 
   
   /* Uncomment the section below if calling the IQNexp() or IQexp()
      functions from the IQMath.lib library in order to utilize the 
      relevant IQ Math table in Boot ROM (This saves space and Boot ROM 
      is 1 wait-state). If this section is not uncommented, IQmathTables2
      will be loaded into other memory (SARAM, Flash, etc.) and will take
      up space, but 0 wait-state is possible.
   */
   /*
   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD 
   {
   
              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
   
   }
   */
   
   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD 
         
   /* Allocate DMA-accessible RAM sections: */
   DMARAML4         : > RAML4,     PAGE = 1
   DMARAML5         : > RAML5,     PAGE = 1
   DMARAML6         : > RAML6,     PAGE = 1
   DMARAML7         : > RAML7,     PAGE = 1
   
   /* Allocate 0x400 of XINTF Zone 7 to storing data */
   ZONE7DATA        : > ZONE7B,    PAGE = 1

   /* .reset is a standard section used by the compiler.  It contains the */ 
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */ 
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT
   
   /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
   .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

Best regards and many many thanks,

Christian

0 Gautam Iyer over 10 years ago in reply to Christian Rod

Guru 192875 points

Hi Chris,

This would sound silly, but as you've followed all the steps correctly: I would like you to create a new workspace -> import the sample flash project there and then port your code in that project. There's a possibility that the workspace might've got corrupted and stopped responding.

Regards,

Gautam

0 Roger Périat over 10 years ago in reply to Christian Rod

Expert 2040 points

Hi Christian

The linker error points you to ebss section which is placed in RAML4. RAML4 has a size of 0x1000 which is not enough. It must be at least 0x1045.

You can define one big RAM section which contains RAML4 and RAML5 or what ever you want. This can be done in the cmd file.

instead of

RAML4 : origin = 0x00C000, length = 0x001000 /* on-chip RAM block L1 */
RAML5 : origin = 0x00D000, length = 0x001000 /* on-chip RAM block L1 */

use this

RAML45 : origin = 0x00C000, length = 0x002000 /* on-chip RAM block L1 */
/* RAML5 : origin = 0x00D000, length = 0x001000 */ /* on-chip RAM block L1 */

and this

.ebss : > RAML45 PAGE = 1

Or you can (also in cmd file) define that ebss should go into RAML4 and RAML5 (or where ever you want).

.ebss : > RAML4 | RAML5 PAGE = 1

hope this helps!

Roger

0 Christian Rod over 10 years ago in reply to Gautam Iyer

Prodigy 210 points

Thanks for the input.

It would have seemed strange since I have other projects (for C28346) in the workspace which compile correctly.

Nevertheless, I tried your solution:

- by creating a new workspace.

- importing the example.

- making a copy of the example to be sure to not damage the example.

- making sure that the copy still compile.

- porting my code in the working copy.

- exactly the same result (same error window, same message, etc...)

- Could the problem be somewhere else than in the main file?

0 Christian Rod over 10 years ago in reply to Roger Périat

Prodigy 210 points

Roger, you're a genius!

Now, that works and I can start debuging the porting!

Thanks a lot, you juste saved my life!

I just had to replace the lines you indicated and modifiy accordingly the lines 179 180:

   /* Allocate DMA-accessible RAM sections: */
    DMARAML45         : > RAML45,     PAGE = 1
   //DMARAML4         : > RAML4,     PAGE = 1
   //DMARAML5         : > RAML5,     PAGE = 1

If you ever need somthing where I can help, do no hesitate!

Thnaks to all of you for the Help!

C U

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