Hello, I trying to configure a 28335, using the McBSp module, as a SPI Slave. The 28335 talks with an ARM device. The ARM sends a 32bit packet every 2ms, but the RRDY bit never set.... This is my configuration
// McBSP-B register settings McbspbRegs.SPCR2.all=0x0000; // Reset FS generator, sample rate generator & transmitter McbspbRegs.SPCR1.all=0x0000; // Reset Receiver, Right justify word, Digital loopback dis. McbspbRegs.SPCR2.bit.GRST=0; // Enable the sample rate generator delay_loop(); McbspbRegs.PCR.all=0x0008; McbspbRegs.SPCR1.bit.DLB = 0; // Loopback mode disabled McbspbRegs.SPCR1.bit.CLKSTP = 2; // Together with CLKXP/CLKRP determines clocking scheme McbspbRegs.PCR.bit.CLKXP = 0; // CPOL = 0, CPHA = 0 rising edge no delay McbspbRegs.PCR.bit.CLKRP = 0; McbspbRegs.RCR2.bit.RDATDLY=0; // FSX setup time 1 in master mode. 0 for slave mode (Receive) McbspbRegs.XCR2.bit.XDATDLY=0; // FSX setup time 1 in master mode. 0 for slave mode (Transmit) McbspbRegs.RCR1.bit.RWDLEN1=5; // 32-bit word McbspbRegs.XCR1.bit.XWDLEN1=5; // 32-bit word McbspbRegs.SRGR2.all=0x2000; // CLKSM=1, FPER = 1 CLKG periods McbspbRegs.SRGR1.all= 0x000F; // Frame Width = 1 CLKG period, CLKGDV=16 McbspbRegs.SPCR2.bit.GRST=1; // Enable the sample rate generator delay_loop(); // Wait at least 2 SRG clock cycles McbspbRegs.SPCR2.bit.XRST=1; // Release TX from Reset McbspbRegs.SPCR1.bit.RRST=1; // Release RX from Reset McbspbRegs.SPCR2.bit.FRST=1; // Frame Sync Generator reset
Anybody can help me? I think that the configuration is ok, but not works... Thanks!
