hi everyone
Now i've coding in CAN BUS receive data use interrupt function
the receive mail box register it can be renew data but the variable can't be
if any one fine coding fault, please tell me
#include "DSP28x_Project.h" // DSP281x Headerfile Include File
//#include "DSP2833x_Examples.h" // DSP281x Examples Include File
int int0count = 0; // Counter to track the # of level 0 interrupts
int int1count = 0; // Counter to track the # of level 1 interrupts
volatile unsigned int MLBX16_HD = 0;
volatile unsigned int MLBX16_LD = 0;
unsigned int MLBX17_HD = 0;
unsigned int MLBX17_LD = 0;
unsigned int message = 0;
int elsecount = 0;
interrupt void eCAN0INT_ISR(void);
//interrupt void eCAN1INT_ISR(void);
void ECan_MALBOX_INIT(void);
struct ECAN_REGS ECanaShadow;
void main()
{
InitSysCtrl();
InitECanGpio();
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
// Initialize the CAN module //
InitECan();
//InitPieVectTable();
ECan_MALBOX_INIT();
EALLOW;
// Configure CAN interrupts //
ECanaShadow.CANMIM.all = 0xFFFFFFFF;
//ECanaRegs.CANMIM.all = ECanaShadow.CANMIM.all;
ECanaShadow.CANMIL.all = 0x00000000; // MBOX0 asserts MTOF0 (eCAN0INT)
//ECanaShadow.CANMIL.bit.MIL0 = 1 ; // MBOX0 asserts MTOF1 (eCAN1INT)
ECanaRegs.CANMIL.all = ECanaShadow.CANMIL.all;
ECanaShadow.CANMIM.all = 0xFFFFFFFF; // Enable interrupts for all mailboxes
ECanaRegs.CANMIM.all = ECanaShadow.CANMIM.all;
//ECanaShadow.CANGIF0.all = ECanaRegs.CANGIF0.all;
//ECanaShadow.CANGIF0.all = 0xFFFFFFFF;
//ECanaRegs.CANGIF0.all = ECanaShadow.CANGIF0.all;
//ECanaShadow.CANGIM.all = ECanaRegs.CANGIM.all;
ECanaShadow.CANGIM.all = 0;
ECanaShadow.CANGIM.bit.I0EN = 1; // Enable eCAN0INT
//ECanaShadow.CANGIM.bit.I1EN = 1; // Enable eCAN1INT
//ECanaShadow.CANGIM.bit.MTOM = 1; // Enable MBX Timeout interrupt
ECanaRegs.CANGIM.all = ECanaShadow.CANGIM.all;
PieVectTable.ECAN0INTA = &eCAN0INT_ISR;
//PieVectTable.ECAN1INTA = &eCAN1INT_ISR;
EDIS;
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable vector fetching from PIE block
PieCtrlRegs.PIEACK.bit.ACK9 = 1; // Enables PIE to drive a pulse into the CPU
PieCtrlRegs.PIEIER9.bit.INTx5 = 1; // Enable INTx.5 of INT9 (eCAN0INT)
//PieCtrlRegs.PIEIER9.bit.INTx6 = 1; // Enable INTx.6 of INT9 (eCAN1INT)
IER |= M_INT9; // Enable INT9 of CPU
EINT; // Global enable of interrupts
//ERTM;
for(;;)
{
message = MLBX16_HD<<8;
message |= MLBX16_LD;
}
}
void ECan_MALBOX_INIT()
{
//struct ECAN_REGS ECanaShadow;
// Config Transmit mail box ID //
ECanaMboxes.MBOX0.MSGID.all = 0x80000501; // Extended Identifier
ECanaMboxes.MBOX1.MSGID.all = 0x80000502; //
ECanaMboxes.MBOX2.MSGID.all = 0x80000503; //
ECanaMboxes.MBOX3.MSGID.all = 0x80000504; //
ECanaMboxes.MBOX4.MSGID.all = 0x80000505; //
ECanaMboxes.MBOX5.MSGID.all = 0x80000506; //
ECanaMboxes.MBOX6.MSGID.all = 0x80000507; //
ECanaMboxes.MBOX7.MSGID.all = 0x80000508; //
ECanaMboxes.MBOX8.MSGID.all = 0x80000509; //
ECanaMboxes.MBOX9.MSGID.all = 0x80000510; //
ECanaMboxes.MBOX10.MSGID.all = 0x80000511; //
ECanaMboxes.MBOX11.MSGID.all = 0x80000512; //
ECanaMboxes.MBOX12.MSGID.all = 0x80000513; //
ECanaMboxes.MBOX13.MSGID.all = 0x80000514; //
ECanaMboxes.MBOX14.MSGID.all = 0x80000515; //
ECanaMboxes.MBOX15.MSGID.all = 0x80000516; //
// Config Receive mail box ID //
ECanaMboxes.MBOX16.MSGID.all = 0x80000601; //
ECanaMboxes.MBOX17.MSGID.all = 0x80000602; //
ECanaMboxes.MBOX18.MSGID.all = 0x80000603; //
ECanaMboxes.MBOX19.MSGID.all = 0x80000604; //
ECanaMboxes.MBOX20.MSGID.all = 0x80000605; //
ECanaMboxes.MBOX21.MSGID.all = 0x80000606; //
ECanaMboxes.MBOX22.MSGID.all = 0x80000607; //
ECanaMboxes.MBOX23.MSGID.all = 0x80000608; //
ECanaMboxes.MBOX24.MSGID.all = 0x80000609; //
ECanaMboxes.MBOX25.MSGID.all = 0x80000610; //
ECanaMboxes.MBOX26.MSGID.all = 0x80000611; //
ECanaMboxes.MBOX27.MSGID.all = 0x80000611; //
ECanaMboxes.MBOX28.MSGID.all = 0x80000613; //
ECanaMboxes.MBOX29.MSGID.all = 0x80000614; //
ECanaMboxes.MBOX30.MSGID.all = 0x80000615; //
ECanaMboxes.MBOX31.MSGID.all = 0x80000616; //
// Write to DLC field in Master Control reg //
ECanaMboxes.MBOX0.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX1.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX2.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX3.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX4.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX5.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX6.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX7.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX8.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX9.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX10.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX11.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX12.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX13.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX14.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX15.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX16.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX17.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX18.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX19.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX20.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX21.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX22.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX23.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX24.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX25.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX26.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX27.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX28.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX29.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX30.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX31.MSGCTRL.bit.DLC = 8;
// Configure Mailbox under test as a Transmit & Receive mailbox //
ECanaShadow.CANMD.all = ECanaRegs.CANMD.all;
ECanaShadow.CANMD.all = 0xFFFF0000;
ECanaRegs.CANMD.all = ECanaShadow.CANMD.all;
// Enable Mailbox under test //
ECanaShadow.CANME.all = ECanaRegs.CANME.all;
ECanaShadow.CANME.all = 0xFFFFFFFF;
ECanaRegs.CANME.all = ECanaShadow.CANME.all;
}
interrupt void eCAN0INT_ISR(void) // eCAN
{
if(ECanaRegs.CANRMP.bit.RMP16 == 1)
{
int0count++;
ECanaRegs.CANRMP.bit.RMP16 = 1;
MLBX16_HD = ECanaMboxes.MBOX16.MDH.all;
MLBX16_LD = ECanaMboxes.MBOX16.MDL.all;
PieCtrlRegs.PIEACK.bit.ACK9 = 1;
EINT;
}
else if(ECanaRegs.CANRMP.bit.RMP17 == 1)
{
int1count++;
ECanaRegs.CANRMP.bit.RMP17 = 1;
MLBX17_HD = ECanaMboxes.MBOX17.MDH.all;
MLBX17_LD = ECanaMboxes.MBOX17.MDL.all;
PieCtrlRegs.PIEACK.bit.ACK9 = 1;
EINT;
}
else
elsecount++;
}
/*CANalyzer configuration file: 1M80SPRX.cfg... */