F28069 Drops into ILLEGAL_ISR during InitFlash()

Other Parts Discussed in Thread: TMS320F28069

Hi there,

I am working with the TMS320F28069 for PLC applications. I am currently trying to use the PRIME libraries to establish modem communications, and I am running into a strange bug.

When I enter debug mode, and run the program, on the first run the program executes into the configFlash() function, which copies phy specific functions from flash memory to ram upon flashing the processor. configFlash() then calls initflash() which lives in the F2806x_SysCtrl.c source file provided by TI. initflash() sets some bits within the FlashRegs and then returns to main. At some point during the execution of initflash() the program jumps to the ILLEGAL_ISR vector, where the cpu is trapped. 

Now, if I reset the debugger (not the cpu) and run the program again, it executes just fine. And, if I step through the program on the first time, as opposed to just running it, the program runs just fine. 

So the only time the ILLEGAL_ISR traps the cpu is on the first debugging run, and only if I run the program, not step through it. 

I have tried using delay statements around where I believe the program is jumping to ILLEGAL_ISR, but no luck. Below is the relevant code from main.c. Any help would be appreciated! Thank you :)

----- relevant code from main.c ----

#ifdef FLASH
/***********************************************************************/
/* Set up for flash */
/***********************************************************************/
/* Following symbols should be referred to linker file */
extern Uint16 secureRamFuncs_loadstart, secureRamFuncs_loadend, secureRamFuncs_runstart;
extern Uint16 isrRamFuncs_loadstart, isrRamFuncs_loadend, isrRamFuncs_runstart;
extern Uint16 phyRamFuncs_loadstart, phyRamFuncs_loadend, phyRamFuncs_runstart;

void config_flash(void)
{
DELAY_US(50L);
/* Copy time critical code and Flash setup code to RAM */
memcpy(&secureRamFuncs_runstart,
&secureRamFuncs_loadstart,
&secureRamFuncs_loadend - &secureRamFuncs_loadstart);

memcpy(&isrRamFuncs_runstart,
&isrRamFuncs_loadstart,
&isrRamFuncs_loadend - &isrRamFuncs_loadstart);

memcpy(&phyRamFuncs_runstart,
&phyRamFuncs_loadstart,
&phyRamFuncs_loadend - &phyRamFuncs_loadstart);

// Call Flash Initialization to setup flash waitstates
// This function must reside in RAM
// InitFlash code in CSL.lib
InitFlash(); // Call the flash wrapper init function
}
#endif

int main(void) {

HAL_status_t afeStat;
HAL_afe_prfParms_t afeParams;

/* System init block */
InitSysCtrl();
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
InitWatchdog();
InitGpio();
DINT;

#ifdef FLASH
/* Configure for flash */
config_flash();
#endif

---- relevant code from F2806x_SysCtrl.c ----

void InitFlash(void)
{
EALLOW;
//Enable Flash Pipeline mode to improve performance
//of code executed from Flash.
FlashRegs.FOPT.bit.ENPIPE = 1;

// CAUTION
//Minimum waitstates required for the flash operating
//at a given CPU rate must be characterized by TI.
//Refer to the datasheet for the latest information.

//Set the Paged Waitstate for the Flash
FlashRegs.FBANKWAIT.bit.PAGEWAIT = 2;

//Set the Random Waitstate for the Flash
FlashRegs.FBANKWAIT.bit.RANDWAIT = 2;

//Set the Waitstate for the OTP
// Here is where it jumps to ILLEGAL_ISR
FlashRegs.FOTPWAIT.bit.OTPWAIT = 2;

// CAUTION
//ONLY THE DEFAULT VALUE FOR THESE 2 REGISTERS SHOULD BE USED
FlashRegs.FSTDBYWAIT.bit.STDBYWAIT = 0x01FF;
FlashRegs.FACTIVEWAIT.bit.ACTIVEWAIT = 0x01FF;
EDIS;

//Force a pipeline flush to ensure that the write to
//the last register configured occurs before returning.

asm(" RPT #7 || NOP");
}