Question about default internal pullup state for GPIO40 and GPIO41?

Hi,

I'm using TMS320F28035.

I want to confirm with TI about the default state of  internal pullup for pin GPIO40 and GPIO41, because the statements made in TI documents seem contradicting.

In TI doc: 'TMS320F2803x Piccolo System Control and Interrupts -- reference guide (revised Feb 2013'

    On page 74, under Step2, it says For pins that can function as ePWM output pins, the internal pullup
resistors are disabled by default. All other GPIO-capable pins have the pullup enabled by default.

     But in the same document,  on page 96, It says The internal pullups on the pins that can be configured as ePWM outputs(GPIO0-GPIO11) are all disabled asynchronously when the external reset signal (XRS) is low. The internal pullups on all other pins are enabled on reset.

Now, for GPIO40 and GPIO41, they can be configured as ePWMs, but apparently they are not GPIO0 to GPIO11, so is the pullup disabled by default for these two pins?

Thanks,