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TMS320F28335 ADC RESULT Registers Justification

Other Parts Discussed in Thread: TMS320F28335

HI!

I am working TMS320F28335 that has a 12-bit ADC, reading the ADC Module datasheet, a question came to my mind about the Conversion Result Buffer Registers.

The Result Register are mapped on two different memory frames

Peripheral Frame2(0x7108-0x7117) - right justified

Peripheral Frame0(0x0B00-0x0B0F)- left justified

Question:

When I read the results from Peripheral Frame 0 (left justified) bits 15 to 12 are always Zero ? Or should i mask them to be sure they are?

I think that the datasheet says nothing about that (or I couldnt find it). It say that after reset they are zero, but could they sporadically change while the program is running?

Thank you