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28069 pwm chopper frequency too high

I am using a 28069 to control the firing SCR's in a large three phase power system controlling weld power. The particular system is a re-spin of a older system that uses opto-isolators to drive NPN transistors which in turn sends gate pulses through a pulse transformer to the (large) SCRs.

For my re-spin of this I assumed I could use the PWMs with the chopper module to provide the pulses. And indeed the pulses are correct but WAYY to high a frequency for an opto coupled system . I have processor running at 90Mhz (and don't wish to change it) so with the maximum divisor in the chopper module I end up with a carrier frequency of 1.4Mhz which is 10-50x too high to pass through the opto couplers. The highest frequency I can get for a transistor output coupler is ~100 to 250Khz.

So my questions are -- what was the intention of having such a small divider for the chopper? Is there any way to drop the rate short of slowing down SYSCLKOUT (which would slow down all the other modules as well)

  • Hi Bill,

    If your intent is to generate lower frequency pulses of ~100KHz you can actually generate PWM waves at that frequency instead of using chopper.

    No need for using chopper. Chopper is usually intended for higher freq. carrier.

    If the switching freq requirement is low you can as well generate the required waveform using normal PWM operation.

    - Subrahmanya Bharathi

     

  • My intent is indeed to generate lower freq pulses - and I need all the stuff the chopper does - accuracy of the leading edge, an extra wide first pulse and then a trailing pulse train - the circuit needs to drive power transistors, through a 1:2 pulse transformer and then to large power SCR's

    In my case the A/B PWM outputs (3 sets) are used to drive the phase shift delay for the SCRS such that I can control 3 phase power going to my machine. (i.e. like a giant, very accurate light dimmer.) Another set of PWMs control sampling points for V and I peak (constant voltage/current modes) and 3 ecap's track frequency. Syncouts and phase regs are used to keep phase shifts aligned on the 6 PWMS involved.

    Note that the PWM output frequency is very low i.e. 20-80Hz (The low end allows for freq. tracking when running on loaded Diesel gensets) - but all need to be very accurate for consistent production.

    The part I don't get is that so many other modules have extensive clock prescaling - it seems odd that the chopper is unnecessarily short-changed (you would only need a few more divider bits - or just allow the source to select from HSPCLKDIV instead of SYSCLKOUT and you would have a general purpose chopper instead of a app specific module in a otherwise general purpose PWM block. The chopper is useful outside of the DC-DC converter/IGBT driver model that you assume here.

    You indicate I can duplicate the required waveform using normal PWM operation but I don't really see how at this point - not with out getting software into the process which will only add jitter. If I'm missing something that can duplicate ALL the chopper functions without adding another source of error I'm open to being educated.

  • Hi Bill,

    Your understanding is correct - and for your case if the chopper has further clock prescaling, it would have addressed your application requirement.
    To generate the waveform using normal PWM operation would involve, lot of, software overhead.
    You need to generate the PWM at high frequency (~100-200KHz is the requirement you stated) and have software keep track of first pulse again this number of pulses to match the low frequency (20-80Hz waveform) pulse width requirements.
    Unfortunately, there is no example code to demonstrate this.

    -Bharathi.

     

  • Bill,

    Generally with PWM frequencies in the 100kHz region, what Bharathi mentions should still be possible and your ISR should be able to keep up with your PWM update without adding jitter.  Using shadow-loading will help with this implementation

    Besides this method, I can think of one other method which is would require a little less hand-holding.  The negative is that it does use a fair amount of resources to generate one PWM, but perhaps it will give you some ideas for your own implementation.

    Consider 3 PWMs. 
    -PWM1A is used as your main PWM and is also routed outside the chip to connect to a TZ input pin.  This PWM would be used as a Cycle-by-Cycle trip for PWM2A. 
    -PWM1B would be used to generates the one-shot pulse with its duty cycle.  This PWM would go to a separate TZ input pin and then go through the Digital Compare (DC) submodule where it would go to a DCxEVTn.force event.  It could then force PWM2A high while PWM1B is high.
    -PWM2A is synched to PWM1 and used to generate a 100kHz PWM of some duty cycle.  This would be your sustaining pulse waveform and is what you would send to your FET. 


    Thank you,
    Brett