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F2837xD cpu/gpio supervision



Hi,

I know each GPIO/peripheral must be given access to one processor only. I was wondering if both of them could read GPIO values. What I'm investigating is if CPU 2 could supervise PWM duty cycle / pulses lenght generated by CPU 1. Sometimes, when phase shifting, compare is skipped and pulses become long... It would be such an awesome feature if F2837xD PWM module fixed this issue but I doubt it... So, I'm looking for ways to catch those events. I have some code doing it but sometimes the detection is done too late. 

Thanks!

  • Hi Mosin,
    Yes. Reading GPIODAT register gives the current state of the physical GPIO pin, regardless of whether the pin is an output or which module/CPU controls it.
    So, you could read the GPIO pin status from CPU2.
    Incase you want to cross check the PWM pulse width - You can also use ECAP to capture the pulse width of the PWM and check the same.
    -Bharathi.

  • Hi,

    Thanks for confirming this. I'll check what can be done with that. About ECAPs, I won't have enough... I need to use them for other features and I'd need 7-8 ECAP just to verify PWMs.

    Also, do you know if the missed compare issue that can be seen when phase shifting is still present in the F2837? 

    If the phase shift makes the PWM count go over the compare value, the compare will still be missed?

    Thanks

  • Hi Mosin,
    If the phase shift goes over compare value you could potentially miss compare event.
    On F28337 there are several enhancements to PWM module which may solve your problem.
    On F28337 you can actually generate an event upon a SYNC in event (refer to AQTSRCSEL/AQCTLA2/B2 regs) and define an action on PWM o/p on a sync in.
    Let me know if this helps.-Bharathi.