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Signal Generation Library questions

Other Parts Discussed in Thread: CONTROLSUITE

The last few days I am struggling with some signal generation code for my C2000 Launchpad. My goal is to generate a harmonic injection pwm. For that purpose I am trying to produce some sine functions suitable for my application. Starting from the very beginning several questions have arouse. 

I have started with this simple code, but I got into some troubles: 

#include "DSP28x_Project.h"   // DSP28x Headerfile
#include <sgen.h>
#include <stdio.h>
#include <file.h>
#include "f2802x_common/include/F2802x_GlobalPrototypes.h"

#include "f2802x_common/include/pll.h"
#include "f2802x_common/include/clk.h"
#include "f2802x_common/include/wdog.h"

#include "f2802x_common/include/flash.h"
#include "f2802x_common/include/gpio.h"
#include "f2802x_common/include/pie.h"
#include "f2802x_common/include/adc.h"
#include "f2802x_common/include/sci.h"
#include "f2802x_common/include/sci_io.h"
#include "f2802x_common/include/pwm.h"
#include "f2802x_common/include/pie.h"
#include "f2802x_common/include/pie_init.h"
#include "f2802x_common/include/timer.h"
#include "f2802x_headers/include/F2802x_PieCtrl.h"
#include "f2802x_headers/include/F2802x_PieVect.h"


#include "f2802x_common/include/IQmathLib.h" //IQmath Library header file

extern void DSP28x_usDelay(Uint32 Count);

// you probably need these
CPU_Handle myCpu;
PLL_Handle myPll;
WDOG_Handle myWDog;
CLK_Handle myClk;

// these are optional
ADC_Handle myAdc;
FLASH_Handle myFlash;
GPIO_Handle myGpio;
PIE_Handle myPie;
SCI_Handle mySci;

void setup_handles()
{

    myClk = CLK_init((void *)CLK_BASE_ADDR, sizeof(CLK_Obj));
    myPll = PLL_init((void *)PLL_BASE_ADDR, sizeof(PLL_Obj));
    myWDog = WDOG_init((void *)WDOG_BASE_ADDR, sizeof(WDOG_Obj));
    myCpu = CPU_init((void *)NULL, sizeof(CPU_Obj));

    myFlash = FLASH_init((void *)FLASH_BASE_ADDR, sizeof(FLASH_Obj));
    myGpio = GPIO_init((void *)GPIO_BASE_ADDR, sizeof(GPIO_Obj));
    myPie = PIE_init((void *)PIE_BASE_ADDR, sizeof(PIE_Obj));
    mySci = SCI_init((void *)SCIA_BASE_ADDR, sizeof(SCI_Obj));
    myAdc = ADC_init((void *)ADC_BASE_ADDR, sizeof(ADC_Obj));


}

void init_system()
{
  WDOG_disable(myWDog);
  (*Device_cal)();
  CLK_setOscSrc(myClk, CLK_OscSrc_Internal);
  PLL_setup(myPll, PLL_Multiplier_12, PLL_DivideSelect_ClkIn_by_2);

  PIE_disable(myPie);
  PIE_disableAllInts(myPie);
  CPU_disableGlobalInts(myCpu);
  CPU_clearIntFlags(myCpu);
#ifdef _FLASH
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
#endif
}
#define SIGNAL_LENGTH 512

/* Create an instance of Signal generator module    */
SGENT_1 sgen = SGENT_1_DEFAULTS;



int ipcb[SIGNAL_LENGTH];

int xn,yn,x;

void main()
{
	    unsigned long i;


		/* Signal Generator module initialisation           */
		sgen.offset=0;
		sgen.gain=0x7fff; /* gain=1 in Q15 */
		sgen.freq=5369; /* freq = (Required Freq/Max Freq)*2^15 */
		/* = (50/305.17)*2^15 = 5369 */
		sgen.step_max=1000; /* Max Freq= (step_max * sampling freq)/65536 */
		sgen.alpha=8192;    /* phase_norm =(pi/4/(2*pi))*2^16=8192   */

		/* So call step_max is normalized fmax in Q16 format             */
		/*  step_max=fmax/fs*65536										 */
		/*  f/fmax*2^15=freq											*/

        for(i=0;i<SIGNAL_LENGTH;i++)
        {
        	ipcb[i]=0;
        }

        for(i=0;i<SIGNAL_LENGTH;i++)
        {
        	sgen.calc(&sgen);
        	xn=sgen.out;
        	ipcb[i]=xn;
        }


		for(;;)
		{
			for(i=0;i<511;i++)
			{
			yn=ipcb[i];
			}
		};
} /* End: main() */

1. I am unable to plot my sine (yn variable) in debug mode. I do not know the appropriate options for tha graphs. Any tutorial or hint would be helpfull.

2. As a noob, I do not really understand the scope of specifing a section in RAM(?) for my generated sine. In the above code, I haven't specified any, so I got the warning in the problems section.

3. Where is the generated signal lockated? RAM, Flash? 

4. It would be more conviniet to generate my signal once. Then save it in a file and load it each time I want it, and not generating it everytime. Any ideas on how to do this?

5. I would really apreciate if someone could indicate me some real life examples that use the signal generation library.

  • Hi,

    Ioannis Pallis said:
    1. I am unable to plot my sine (yn variable) in debug mode. I do not know the appropriate options for tha graphs. Any tutorial or hint would be helpfull.

    yn is a single variable, not an array. Did you want to continuously plot ipcb ?

    Ioannis Pallis said:
    2. As a noob, I do not really understand the scope of specifing a section in RAM(?) for my generated sine. In the above code, I haven't specified any, so I got the warning in the problems section.

    If you look at the library, C:\ti\controlSUITE\libs\dsp\SGEN\v101\cmd\28335_SGEN_RAM_lnk.cmd, you will see these sections:

    DLOG : > RAML5, PAGE = 1
    SGENipcb : > RAML61, PAGE = 1
    SGENipcbsrc : > RAML62, PAGE = 1

    ipcb1 : > RAML61, PAGE = 1
    ipcb2 : > RAML62, PAGE = 1
    ipcb3 : > RAML5, PAGE = 1
    ipcb4 : > RAML5, PAGE = 1
    ipcb5 : > RAML4, PAGE = 1
    ipcb6 : > RAML4, PAGE = 1

    SINTBL : > RAML7, PAGE = 1

       DLOG	 			: >	RAML5,	   PAGE = 1
       SGENipcb			: > RAML61,    PAGE = 1  
       SGENipcbsrc   	: >	RAML62,	   PAGE = 1
       
       ipcb1			: > RAML61,	   PAGE = 1  
       ipcb2   			: >	RAML62,	   PAGE = 1
       ipcb3	 		: >	RAML5,	   PAGE = 1
       ipcb4	 		: >	RAML5,	   PAGE = 1
       ipcb5	 		: >	RAML4,	   PAGE = 1
       ipcb6	 		: >	RAML4,	   PAGE = 1
       
       SINTBL			: > RAML7,     PAGE = 1

    These sections are where the various buffers used in the sine generation are stored. If you don't have these section in your linker command file, the compiler will issue a warning that these sections are missing, and then place the buffers at the first available location.

    Ioannis Pallis said:
    3. Where is the generated signal lockated? RAM, Flash? 

    In the example, C:\ti\controlSUITE\libs\dsp\SGEN\v101\examples_ccsv4\2833x_SGENT1\source\sgent1.c, you will see

    #pragma DATA_SECTION(ipcb, "SGENipcb");
    int ipcb[SIGNAL_LENGTH]; 

    ipcb stores the sine wave and its placed in the section SGENipcb, which if you look at the linker command file snippet above, is placed in RAML61. This buffer, being writeable, must be placed in RAM

    Ioannis Pallis said:
    4. It would be more conviniet to generate my signal once. Then save it in a file and load it each time I want it, and not generating it everytime. Any ideas on how to do this?

    Sure you can run this SGEN example, generate your sine in ipcb, open a "Memory Browser" window in CCS to that location and either dump it (there is a button to do this - look around, you will find it) or just copy to notepad and place into an array.

    Ioannis Pallis said:
    5. I would really apreciate if someone could indicate me some real life examples that use the signal generation library.

    I think some of the motor control or digital power libraries use this, im not sure but if you poke around in C:\ti\controlSUITE\libs\app_libs, you will find one the libraries using them.