ADC ISR is not working when CPU Timer 0 interrupt triggered ISR is included in code

Hi Tanmayee,

This should not happen. Some config issue I guess! Please check the following links:

Regards,

Gautam

Gautam,
Actually ADC ISR is running for some time and then is going off.
If I acknowledge PIE_GROUP1 interrupt at both places, ADC ISR as well as Timer0 ISR,
Is there any problem in that case? because my ADC interrupt flag ADCINTFLG is not getting cleared after running correctly for some time.

Did you try the above nesting concept?

Gautam,
I tried the nesting in both ISRs , The ADC ISR doesn't work properly. I gone through same problem here e2e.ti.com/.../194264 on the forum, Is there any other solution?
Regards,
Tanmayee

Tanmayee, can you share the code with interrupt initializations? You don't have to share any of your ISR routines... just the structure.

Regards,
Gautam

Hi Gautam ,
Pls find the structure below:

C Code:
EALLOW;
PieVectTable.ADCINT1 = &A_ISR; (//20Khz) (A_ISR in Assembly CODE, PWM 4 is the trigger)
PieVectTable.ECAP1_INT = &ECap1_ISR;
PieVectTable.EPWM3_INT = &B_ISR; // Map Interrupt 20Khz in Assembly code
PieCtrlRegs.PIEIER3.bit.INTx3 = 1; // PIE level enable, Grp3 / Int1, ePWM3
EPwm3Regs.CMPB = 80; // ISR trigger point
EPwm3Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPB; // INT on CompareB-Up event
EPwm3Regs.ETSEL.bit.INTEN = 1; // Enable INT
EPwm3Regs.ETPS.bit.INTPRD = ET_2ND;


PieVectTable.TINT0 = &C_ISR; // C Code
CpuTimer0Regs.PRD.all=mSec1; //1Khz
CpuTimer0Regs.TCR.bit.TIE = 1;
CpuTimer0.InterruptCount = 0;
CpuTimer0Regs.TCR.all = 0x4001;

PieCtrlRegs.PIEIER1.bit.INTx1 = 1;
PieCtrlRegs.PIEIER9.bit.INTx3 = 1; // PIE Group 9, INT3
PieCtrlRegs.PIEIER1.bit.INTx7 = 1;

IER = 0x100;
IER |= M_INT1;
IER |= M_INT3;
IER |= M_INT4;
EDIS;
------------------------------------------------------------
A_ISR:

PUSH AR1H:AR0H
PUSH XAR2
PUSH XAR3
PUSH XAR4
PUSH XAR5
PUSH XAR6
PUSH XAR7
PUSH XT
SPM 0 ; set C28 mode
CLRC AMODE
CLRC PAGE0,OVM
; CLRC INTM ; clear interrupt mask - comment if ISR non-nestable


//ISR Code .........................

//ADC Flag interrupt cleared
MOVW DP,#_AdcRegs.ADCINTFLGCLR
MOV @_AdcRegs.ADCINTFLGCLR,#0x1

MOVW DP,#_PieCtrlRegs.PIEACK ; Acknowledge PIE interrupt Group 1
MOV @_PieCtrlRegs.PIEACK,#0x1

; SETC INTM ; set INTM to protect context restore
POP XT
POP XAR7
POP XAR6
POP XAR5
POP XAR4
POP XAR3
POP XAR2
POP AR1H:AR0H
IRET ; return from interrupt
.end
--------------------------------------------------------------------------------------------------------
//C_ISR: (Timer 0 interrupt)

interrupt void C_ISR(void)
{
CpuTimer0.InterruptCount++;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

EINT;

//ISR code...................................




}

Also Timer 0 is used for state machine tasks(four tasks A0,A1,A2,A3,A4)

A_ISR, is called for some time and then after some time is not called.
Regards,
Tanmayee

Ok, you can delete EINT from cpu_timer routine - not required. Also, in absence of cpu_timer isr ADC_ISR seems to work very well right ?

On including and removing EINT in Timer ISR, the program behaves in a weird way. Sometimes ADC ISR gets called for certain time and sometimes ADC ISR never called, for both removing and including EINT. Also, when I included CLRC INTM and SETC INTM in ADC ISR, presence or absence of EINT in TIMER ISR, ADC ISR gets called for certain time.
And yes , in absence of cpu_timer isr ADC_ISR works very well.
Regards,
Tanmayee

This means that there's some issue with acknowledgement.
Tanmayee, I would like you to implement ADC ISR & CPU ISR as mentioned in example codes in controlSuite. Later you can add the asm code to ADC ISR. Follow the same structure there.

Hello,

How about if you put PieCtrlRegs.PIEACK.all |= PIEACK_GROUP1; instead of PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; ?

Best regards,

Maria

Thanks Gautam and Maria for suggestions, I will update the code and check it . Will surely let you know about it...