Hello everyone,
So I have a lot of questions regarding the C2000 RAM blocks use. I hope you can help me with this, Real time control MCUs like this is pretty new to me, I basically only used ARM based MCUs until now.
I have been looking not only at the older C2000 launchpad but also the new one.
The F28027 is much simples, no DMA, no CLA, just 3 RAM blocks, M0, M1 and L0.
The F28069 has DMA, CLA, 11 SARAM blocks.
My questions are:
If I load code into block M0 and use M1 or L0 for data variables, will I have some sort of wait state? The C28x uses Harvard arquitecture so it should have no problems acessing data and code at the same time, but my question is focusing in the RAM blocks. Are the access to RAM blocks independent?
Also, in the F28069 which has DMA and CLA,
The DPSARAM can be accessed by both the memory bus and DMA/CLA bus but never at the same time, correct? So with this, for maximum optimization I should try to, if possible, "assign" the DMA and CLA to use a dedicated RAM block. So is it possible to keep the CPU from using certain RAM blocks so I can use them only for the DMA and CLA? (if possible I imagine it's in the linker, just wanted to check the info).
Now about Mx and Lx SARAMs. The difference (besides sometimes in size) is only that Lx SARAM can be secured, but some in the F28069 are not, so what is the difference betwen Mx and Lx? So I assume that they are usually the ones used for running code.
More questions :p
I've been searching some technical files for the C2000. I found something about running application code from flash.
Made me wonder, running code from RAM is pretty standard for the C2000? Is the Flash normally used for actually storing data in long term?
I hope someone can help me with these doubts, I am very interested in this MCU architecture.