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interrupt void INT_NOTUSED_ISR(void) reached without reason

Hello,

We use the ezdspf28335c demo board for prototyping our project.

The program is running in debug mode.

In order to configure our interruptions, we modified the following TI files: "DSP2833x_DefaultIsr.c", "DSP2833x_DefaultIsr.h" and "DSP2833x_SWPrioritizedIsrLevels.h".


Here is our group priority levels:

#define    G11PL       0        // SEQ1INT     (ADC)
#define    G12PL       0        // SEQ2INT     (ADC)
#define    G13PL       0        // reserved
#define    G14PL       0        // XINT1       (External)
#define    G15PL       0        // XINT2       (External)
#define    G16PL       0        // ADCINT      (ADC)
#define    G17PL       1        // TINT0       (CPU Timer 0)
#define    G18PL       0        // WAKEINT     (WD/LPM)

#define    G21PL       0        // EPWM1_TZINT (ePWM1 Trip)
#define    G22PL       0        // EPWM2_TZINT (ePWM2 Trip)
#define    G23PL       0        // EPWM3_TZINT (ePWM3 Trip)
#define    G24PL       0        // EPWM4_TZINT (ePWM4 Trip)
#define    G25PL       0        // EPWM5_TZINT (ePWM5 Trip)
#define    G26PL       0        // EPWM6_TZINT (ePWM6 Trip)
#define    G27PL       0        // reserved
#define    G28PL       0        // reserved

#define    G31PL       0        // EPWM1_INT   (ePWM1 Int)
#define    G32PL       0        // EPWM2_INT   (ePWM2 Int)
#define    G33PL       0        // EPWM3_INT   (ePWM3 Int)
#define    G34PL       0        // EPWM4_INT   (ePWM4 Int)
#define    G35PL       0        // EPWM5_INT   (ePWM5 Int)
#define    G36PL       0        // EPWM6_INT   (ePWM6 Int)
#define    G37PL       0        // reserved
#define    G38PL       0        // reserved

#define    G41PL       1        // ECAP1_INT   (eCAP1 Int)
#define    G42PL       0        // ECAP2_INT   (eCAP2 Int)
#define    G43PL       0        // ECAP3_INT   (eCAP3 Int)
#define    G44PL       0        // ECAP4_INT   (eCAP4 Int)
#define    G45PL       0        // ECAP5_INT   (eCAP5 Int)
#define    G46PL       0        // ECAP6_INT   (eCAP6 Int)
#define    G47PL       0        // reserved
#define    G48PL       0        // reserved

#define    G51PL       0        // EQEP1_INT   (eQEP1 Int)
#define    G52PL       0        // EQEP2_INT   (eQEP2 Int)
#define    G53PL       0        // reserved
#define    G54PL       0        // reserved
#define    G55PL       0        // reserved
#define    G56PL       0        // reserved
#define    G57PL       0        // reserved
#define    G58PL       0        // reserved

#define    G61PL       0        // SPIRXINTA   (SPI-A)
#define    G62PL       0        // SPITXINTA   (SPI-A)
#define    G63PL       0        // MRINTB      (McBSP-B)
#define    G64PL       0        // MXINTB      (McBSP-B)
#define    G65PL       0        // MRINTA      (McBSP-A)
#define    G66PL       0        // MXINTA      (McBSP-A)
#define    G67PL       0        // reserved
#define    G68PL       0        // reserved         

#define    G71PL       0        // DINTCH1     (DMA)
#define    G72PL       0        // DINTCH2     (DMA)
#define    G73PL       0        // DINTCH3     (DMA)
#define    G74PL       0        // DINTCH4     (DMA)
#define    G75PL       0        // DINTCH5     (DMA)
#define    G76PL       0        // DINTCH6     (DMA)
#define    G77PL       0        // reserved
#define    G78PL       0        // reserved

#define    G81PL       0        // I2CINT1A    (I2C-A)
#define    G82PL       0        // I2CINT2A    (I2C-A)
#define    G83PL       0        // reserved
#define    G84PL       0        // reserved
#define    G85PL       1        // SCIRXINTC   (SCI-C)
#define    G86PL       2        // SCITXINTC   (SCI-C)
#define    G87PL       0        // reserved
#define    G88PL       0        // reserved

#define    G91PL       0        // SCIRXINTA   (SCI-A)
#define    G92PL       0        // SCITXINTA   (SCI-A)
#define    G93PL       0        // SCIRXINTB   (SCI-B)
#define    G94PL       2        // SCITXINTB   (SCI-B)
#define    G95PL       0        // ECAN0INTA   (ECAN-A)
#define    G96PL       0        // ECAN1INTA   (ECAN-A)
#define    G97PL       0        // ECAN0INTB   (ECAN-B)
#define    G98PL       0        // ECAN1INTB   (ECAN-B)

#define    G101PL      0        // reserved
#define    G102PL      0        // reserved
#define    G103PL      0        // reserved
#define    G104PL      0        // reserved
#define    G105PL      0        // reserved
#define    G106PL      0        // reserved
#define    G107PL      0        // reserved
#define    G108PL      0        // reserved

#define    G111PL      0        // reserved
#define    G112PL      0        // reserved
#define    G113PL      0        // reserved
#define    G114PL      0        // reserved
#define    G115PL      0        // reserved
#define    G116PL      0        // reserved
#define    G117PL      0        // reserved
#define    G118PL      0        // reserved

#define    G121PL      0        // XINT3       (External)
#define    G122PL      0        // XINT4       (External)
#define    G123PL      0        // XINT5       (External)
#define    G124PL      0        // XINT6       (External)
#define    G125PL      0        // XINT7       (External)
#define    G126PL      0        // reserved
#define    G127PL      0        // LVF         (FPA32)
#define    G128PL      0        // LUF         (FPA32)

#define    INT1PL      1        // Group1 Interrupts (PIEIER1)
#define    INT2PL      0        // Group2 Interrupts (PIEIER2)
#define    INT3PL      0        // Group3 Interrupts (PIEIER3)
#define    INT4PL      3        // Group4 Interrupts (PIEIER4)
#define    INT5PL      0        // Group5 Interrupts (PIEIER5)
#define    INT6PL      0        // Group6 Interrupts (PIEIER6)
#define    INT7PL      0        // reserved
#define    INT8PL      1        // reserved
#define    INT9PL      2        // Group9 Interrupts (PIEIER9)
#define    INT10PL     0        // reserved
#define    INT11PL     0        // reserved
#define    INT12PL     0        // reserved
#define    INT13PL     0        // XINT13
#define    INT14PL     0        // INT14 (TINT2)
#define    INT15PL     0        // DATALOG
#define    INT16PL     0        // RTOSINT

We use SCI B, SCI C, ECAP1 and CPU timer 0 in our project.

The interrupts are enabled by:
EINT;   // Enable Global interrupt INTM
ERTM;   // Enable Global realtime interrupt DBGM


When we run the program, randomly, the program stops in the interrupt void INT_NOTUSED_ISR(void). Our problem seems to occur when we use an SCI at 2,3Mbit/s (BRR=1, LSPCLK=37.5MHz).

What is the typical approach to elucidate the cause of this ? I mean, is it possible to find which interrupt is raised, which causes the INT_NOTUSED_ISR to be called?
Is there a standard method to use the SCI without reaching the INT_NOTUSED_ISR interrupt at 2.3MBits/s?
Could it be due to the Debug mode?

English is not my mother tongue, so I apologize in advance for my English mistakes.
If i missed to explain important facts, don't hesitate to ask me some details.


Best regards

  • Hello,

    When you get stopped in the IN_NOTUSED_ISR, can you take a look at the contents of the PIECTRL.PIEVECT register? It contains the upper 15 bits of the vector address of the vector that was fetched. So you could add bit of code like this:

    address_offset = ((PieCtrlRegs.PIECTRL.all) & (0x00000000FE));
    interrupt_num = (address_offset >> 1);

    And "interrupt_num" will contain the vector ID. You can look that up in your reference guide to find out which interrupt occurred. That will help to start tracking down what's causing this.

    Thanks,
    Whitney