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How to flash F28377D with juste USB cables ?

user42410263
Prodigy 60 points

Other Parts Discussed in Thread: TMS320F28377D, CONTROLSUITE

Hello,

Firstly, this is my context :

  • C2000 Microcontrollers Development Tools
  • With TMS320F28377D (Delfino) and controlCARD Docking Station
  • With 2 USB cables and 1 USB Mini cable
  • Code Composer Strudio 6.1.0 (up to date)
  • I discovered this IDE and this hardware

I followed Blinky example on controlSUITE and also the User's Guide to create and to debug a project (F2837xD Firmware Development Package).

However, I can't put my program in the Delfino flash memory because I have always errors.

In my configurations, I used the connection Texas Instruments XDS100v3 USB Debug Probe, but, I am not very sure of this choice given that I only have USB cables.

When I want to debug and to connect my application, errors are :

" Texas Instruments XDS100v3 USB Debug Probe_0/IcePick_C_0 : Target must be connected before loading program.
Texas Instruments XDS100v3 USB Debug Probe_0/C28xx_CPU1 : Target must be connected before loading program.
IcePick_C_0: Error connecting to the target: (Error -151 @ 0x0) One of the FTDI driver functions used during the connect returned bad status or an error. The cause may be one or more of: invalid XDS100 serial number, blank XDS100 EEPROM, missing FTDI drivers, faulty USB cable. Use the xds100serial command-line utility in the 'common/uscif' folder to verify the XDS100 can be located. (Emulation package 5.1.641.0) "

Therefore, I wonder what is the way to use my device with juste USB cables ?

Can you help me to do a correct configuration ?

 

Best regards,

Kévin

  • 0
    Guru 192875 points
    Hi Kevin,

    Check this thread to run program from flash for the above device:
    e2e.ti.com/.../1361880

    Regards,
    Gautam
  • 0
    TI__Guru 61235 points

    Kevin,

    I cannot tell from your post whether you can connect to the target at all with CCS.  Forget about the flash, you said you created and debugged a project.  Are you saying you were able to load the project into RAM and debug it using CCS?  Or maybe you just mean you were able to build the project.

    You need to first establish the connection with the target using CCS.  The emulator on the experimenter's kit is xds100v2.  The emulator is on the USB connector on the CARD (not the docking board).  The USB jack on the dock is only to power the whole rig.  With the system powered and the emulator USB connected to your PC, start CCS and setup a XDS100v2 target configuration.  Then click "Test Connection".  Is it successful or does it report an error?

    Regards,

    David

  • 0 in reply to Gautam Iyer
    Prodigy 60 points
    Thank you for your help.

    I followed these instructions :
    - In Properties/C2000 Compiler/Advanced Options/Predefined Symbols/Pre-Define NAME, I defined "_FLASH". So, now, I have 2 pre-define, "CPU1" and "_FLASH".

    - In Proprerties/C2000 Linker/File Search Path/Include library, I defined "C:\ti\...\2837x_FLASH_lnk_cpu1.cmd", "C:\ti\...\rts2800_fpu32.lib", "C:\ti\...\F2837x_Headers_nonBIOS_cpu1.cmd" and "libc.a".

    - File "Codestartbranch.asm" is part of the project.

    - I'm not sure, but I think I am in Position 11 (Mode 3 - "Get Mode") .

    Then, when I Build and Debug, the Console displays :
    (remark : howerver, I put the config with XDS100v2 otherwise the test doesn't work)

    Texas Instruments XDS100v2 USB Debug Probe_0/IcePick_C_0 : Target must be connected before loading program.
    C28xx_CPU1: GEL Output:
    Memory Map Initialization Complete
    C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.
    C28xx_CPU2: GEL Output:
    Memory Map Initialization Complete
    C28xx_CPU2: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.

    I think that my config is not perfect although the program seems to work.

    What about you ?

    Best regards,
    Kévin
  • 0 in reply to David M. Alter
    Prodigy 60 points
    David M. Alter,

    Sorry, I didn't see your answer before posting my second message.

    So, I connected my controlCARD with a USB cable and a USB Mini cable in the other port.
    When I test my connection with XDS100v2, this message is displayed, so I think it's good.

    [Start: Texas Instruments XDS100v2 USB Debug Probe_0]
    Execute the command:
    %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity
    ...
    The JTAG DR Integrity scan-test has succeeded.
    [End: Texas Instruments XDS100v2 USB Debug Probe_0]
  • 0 in reply to user42410263
    Guru 192875 points
    As your program is working fine...your configuration should be fine.

    Regards,
    Gautam