Position feedback resolver using F28069 piccolo.

Hi ShengHua,

There is a F28035 based project 'HVPM_Sensored_Servo', can be found at

\development_kits\HVMotorCtrl+PfcKit_v2.1\HVPM_Sensored_Servo

The C file 'HVPM_Sensored_Servo.c' has the information you are looking for. You may need some tweaking.

Best regards,

ramesh

Dear ramesh :

Thanks your help.  I have seen the sampe codes of SPI slave for Resolver interface as below.

What different bwteeen F28035 and F28069 about pin assignment and configuration in SPI interface?

In SPI Master ,F28035 can receive Resolver position and Transmit the position information with a period of 10KHz by SPI interface.

In SPI Slave, Is it necessary to set the 10 KHz of interrupt (F28068) to update resolver data for motor control ? 

Best Regard,

ShengHua

///////////////////////////////// Sample code from : \development_kits\HVMotorCtrl+PfcKit_v2.1\HVPM_Sensored_Servo////////////////////////////////////////

#if (BUILDLEVEL==LEVEL6)
 // SPIB slave config for resolver interface
 SPI_slave_init();
 SPIPORT.SPIFFRX.bit.RXFFIENA = 1;     // enable rx fifo int based rxffil match
    SPIPORT.SPICTL.bit.SPIINTENA = 1;     // SPI int disable

// SPIB Rx interrupt settings
 EALLOW; // This is needed to write to EALLOW protected registers
 PIEVECT_SPIRXINT = &SpiRxISR;  // PieVectTable.SPIRXINT(A/B)
 EDIS;

// Enable PIE group 6 interrupt 1 for SPIB_RX_INT
    PieCtrlRegs.PIEIER6.bit.INTx1 = 1;   // SPIA_RX - INTx1,   SPIB_RX - INTx3

// Enable CPU INT6 for SPIA(B)_RX_INT:
 IER |= M_INT6;
#endif

// ====================================================================
// Initialize SPI in slave mode to receive position data from resolver
// ====================================================================
void SPI_slave_init(void)
{
    // Initialize SPI FIFO registers
    SPIPORT.SPIFFTX.bit.SPIRST     = 1;       // enable fifo - 0xE040;
    SPIPORT.SPIFFTX.bit.SPIFFENA   = 1;       // enable fifo enhancements
    SPIPORT.SPIFFTX.bit.TXFIFO     = 1;       // re-enable tx fifo
    SPIPORT.SPIFFTX.bit.TXFFIENA   = 0;       // disable tx fifo int based txffil match
    SPIPORT.SPIFFTX.bit.TXFFINTCLR = 1;       // clr TXFFINT flag in SPIFFTX

    //SPIPORT.SPIFFRX.bit.RXFFOVFCLR = 1;     // clr RXFFOVF flag in SPIFFRX - 0x2042;
    SPIPORT.SPIFFRX.bit.RXFIFORESET = 1;      // re-enable rx fifo
    SPIPORT.SPIFFRX.bit.RXFFINTCLR  = 1;      // clr RXFFINT flag in SPIFFRX
    SPIPORT.SPIFFRX.bit.RXFFIENA    = 0;      // disable rx fifo int based rxffil match
    SPIPORT.SPIFFRX.bit.RXFFIL      = 2;      // two rx data

    SPIPORT.SPIFFCT.all=0x0;                  // no time space between consecutive words in a packet

    // Initialize SPI
 SPIPORT.SPICCR.bit.SPISWRESET  = 0;       // reset SPI - 0x000F
 SPIPORT.SPICCR.bit.SPILBK      = 0;       // no loop back
 SPIPORT.SPICCR.bit.CLKPOLARITY = 0;       // clk polarity is rising edge
 SPIPORT.SPICCR.bit.SPICHAR     = 0xf;     // data length = 16b

 SPIPORT.SPICTL.bit.CLK_PHASE     = 0;     // Enable normal phase - 0x0002
    SPIPORT.SPICTL.bit.MASTER_SLAVE  = 0;     // slave mode
    SPIPORT.SPICTL.bit.OVERRUNINTENA = 0;     // disable rx overrun flag bit interrupts (SPISTS.7)
    SPIPORT.SPICTL.bit.TALK          = 1;     // enable talk
    SPIPORT.SPICTL.bit.SPIINTENA     = 0;     // SPI int disable

 //SPIPORT.SPIBRR =0x00F;                    // Baud rate

    SPIPORT.SPICCR.bit.SPISWRESET    = 1;       // Relinquish SPI from Reset

    SPIPORT.SPIPRI.bit.FREE    = 1;             // Set so breakpoints don't disturb xmission
    SPIPORT.SPIPRI.bit.STEINV  = 0;             // SPISTE pin in normal mode (no inversion)
    SPIPORT.SPIPRI.bit.TRIWIRE = 0;             // 4 wire SPI
}
#endif

interrupt void SpiRxISR(void)
{
 resolver1.RawTheta = SPIPORT.SPIRXBUF;
 resolver1.Speed    = (int16)SPIPORT.SPIRXBUF;

 SPIPORT.SPIFFRX.bit.RXFFOVFCLR = 1;                // Clear Overflow flag
 SPIPORT.SPIFFRX.bit.RXFFINTCLR = 1;                // Clear Interrupt flag
 PieCtrlRegs.PIEACK.all         = PIEACK_GROUP6;    // Issue PIE ack

 spiReady = 4;
 return;
}

I recommend you to review the TRM for differences.

You don't have to set up the slave ISR at 10KHz. Typically if the slave's input buffer is filled up, it should be set up to generate an ISR. Since the master is sending in new data @ 10KHz rate, the slave will generate interrupt at that speed as well.

rgds,

ramesh

Hi ramesh :

Thanks a lot.

Best Regards,

ShengHua