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interrupt not interrupted by higher prioritised interrupt

Other Parts Discussed in Thread: TMS320F28027, CONTROLSUITE

hi,

I'm using the TMS320F28027 for a system with multiple interrupts.

ADC_INT1: ADC Measuerment (35kHz-50kHz)         Highest Priority

EPWM3_INT: Error Handling(10kHz)

ECAP1_INT: Frequenzy Control(35kHz-50kHz)

I2C_INT: Communication

TINT1: System Control (1ms)                                        lowest priority

The standard interrupt priority table is sufficiant for this application so I did'nt change anything.

The problem is that in some cases the TINT1 Interrupt is not interrupted by the EPWM3_INT. I attached a picture where you can see the situation.

RED:EPWM3_INT

BLUE: TINT1

As you can see in some cases TINT1blocks the EPWM3_INT from excecution although EPWM3_INT has higher priority. This especially happens when the TINT1 Interrupt occures short after the EPWM3_INT. Has anyone an idea whats the reason for this behaviour?

Thanks

Dominic

  • Dominic,

    There is no hardware interrupt pre-emption on C2000. Interrupts are globally masked when you enter the ISR.  If you want pre-emption you have to manage the interrupt enable registers within the ISR.  There are examples of how to do that in the header files in controlSUITE.  

    The hardware priority level applies only when two interrupts appear at the core in the same clock cycle.

    Regards,

    Richard

  • Hi Richard,

    I think I come closer to the problem. Right now I enable global interrupts right after entering the interrupt using "EINT;". In this case if I enter EPWM3_INT and I enable global Interrupts, any incoming interrupts is served. In my case the TINT0 interrupt is occuring after the EPWM3_INT since global interrupts are enabled this interupt is served. Is this understanding right?

    Regards,
    Dominic
  • Hi Dominic,

    Yes, that is correct.

    Regards,

    Richard