Other Parts Discussed in Thread: TMS320F28335
Hello,
Iam using the TMS320F28335 experimental board and running a piece of code at ADC sampling frequency of 200KHz. I am using GPIO toggle to see the rate of ADC sampling. When i observed the GPIO toggle over a scope the frequency of toggling is not constant and its around 16KHz. .I think the code inside the ADC interrupt is taking a longer time than ADC sampling time . When i run the same piece of code at 10KHz ,I am able to see the GPIO toggle at the same rate.
what can be the problem?
Iam attaching the code.
//###########################################################################
//
// FILE: Example_2833xAdc.c
//
// TITLE: DSP2833x ADC Example Program.
//
// ASSUMPTIONS:
//
// This program requires the DSP2833x header files.
//
// Make sure the CPU clock speed is properly defined in
// DSP2833x_Examples.h before compiling this example.
//
// Connect signals to be converted to A2 and A3.
//
// As supplied, this project is configured for "boot to SARAM"
// operation. The 2833x Boot Mode table is shown below.
// For information on configuring the boot mode of an eZdsp,
// please refer to the documentation included with the eZdsp,
//
// $Boot_Table:
//
// GPIO87 GPIO86 GPIO85 GPIO84
// XA15 XA14 XA13 XA12
// PU PU PU PU
// ==========================================
// 1 1 1 1 Jump to Flash
// 1 1 1 0 SCI-A boot
// 1 1 0 1 SPI-A boot
// 1 1 0 0 I2C-A boot
// 1 0 1 1 eCAN-A boot
// 1 0 1 0 McBSP-A boot
// 1 0 0 1 Jump to XINTF x16
// 1 0 0 0 Jump to XINTF x32
// 0 1 1 1 Jump to OTP
// 0 1 1 0 Parallel GPIO I/O boot
// 0 1 0 1 Parallel XINTF boot
// 0 1 0 0 Jump to SARAM <- "boot to SARAM"
// 0 0 1 1 Branch to check boot mode
// 0 0 1 0 Boot to flash, bypass ADC cal
// 0 0 0 1 Boot to SARAM, bypass ADC cal
// 0 0 0 0 Boot to SCI-A, bypass ADC cal
// Boot_Table_End$
//
// DESCRIPTION:
//
// This example sets up the PLL in x10/2 mode.
//
// For 150 MHz devices (default)
// divides SYSCLKOUT by six to reach a 25.0Mhz HSPCLK
// (assuming a 30Mhz XCLKIN).
//
// For 100 MHz devices:
// divides SYSCLKOUT by four to reach a 25.0Mhz HSPCLK
// (assuming a 20Mhz XCLKIN).
//
// Interrupts are enabled and the ePWM1 is setup to generate a periodic
// ADC SOC on SEQ1. Two channels are converted, ADCINA3 and ADCINA2.
//
// Watch Variables:
//
// Voltage1[10] Last 10 ADCRESULT0 values
// Voltage2[10] Last 10 ADCRESULT1 values
// ConversionCount Current result number 0-9
// LoopCount Idle loop counter
//
//
//###########################################################################
//
// Original Author: D.F.
//
// $TI Release: 2833x/2823x Header Files and Peripheral Examples V133 $
// $Release Date: June 8, 2012 $
//###########################################################################
#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
#include "math.h"
// Prototype statements for functions found within this file.
interrupt void adc_isr(void);
// Global variables used in this example:
Uint16 i,j;
float Va,Vas,Vdc,Vref=150,kp=(0.001/(2*0.01)),ki,ploss,T=5/1000000;
float parray,err;
float Vb,Vbs;
float Vc,Vcs;
float Ia,Ias,Ial,Iac,Iacarr[100],Iaf,Iafarr[100],Ibfarr[100],Icfarr[100];
float Ib,Ibs,Ibl,Ibc,Ibf;
float Ic,Ics,Icl,Icc,Icf;
float Valpha;
float Vbeta;
float Ialpha,Ialpc;
float Ibeta,Ibetc;
float p,pc;
float q,hb=0.125;
float pfilt,wprev,wprev_1,wprev_2,err_prev,ploss_prev;
void GpioSelect(void);
void delay_loop(void);
main()
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2833x_SysCtrl.c file.
InitSysCtrl();
EALLOW;
#if (CPU_FRQ_150MHZ) // Default - 150 MHz SYSCLKOUT
#define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25.0 MHz
#endif
#if (CPU_FRQ_100MHZ)
#define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2) = 25.0 MHz
#endif
EDIS;
// Define ADCCLK clock frequency ( less than or equal to 25 MHz )
// Assuming InitSysCtrl() has set SYSCLKOUT to 150 MHz
EALLOW;
SysCtrlRegs.HISPCP.all = ADC_MODCLK;
EDIS;
// Step 2. Initialize GPIO:
// This example function is found in the DSP2833x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
InitPieVectTable();
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected register
PieVectTable.ADCINT = &adc_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
GpioSelect();
// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP2833x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
InitAdc(); // For this example, init the ADC
// Step 5. User specific code, enable interrupts:
// Enable ADCINT in PIE
PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
IER |= M_INT1; // Enable CPU Interrupt 1
EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
i = 0;
wprev_1=0;
wprev_2=0;
err_prev=0;
ploss_prev=0;
ki=kp/2;
//GPIOsetup
// Configure ADC
AdcRegs.ADCMAXCONV.all = 0x0009; // Setup 2 conv's on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; // Setup ADCINA3 as 1st SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1;
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2;
AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x3;
AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x4;
AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x5;
AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x9;
AdcRegs.ADCCHSELSEQ3.bit.CONV09 = 0xA;
AdcRegs.ADCCHSELSEQ3.bit.CONV08 = 0xB;
AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x6;
// Assumes ePWM1 clock is already enabled in InitSysCtrl();
AdcRegs.ADCTRL1.bit.CPS = 0;
AdcRegs.ADCTRL1.bit.ACQ_PS = 0x0;
AdcRegs.ADCTRL1.bit.SEQ_CASC = 1;
AdcRegs.ADCTRL1.bit.CONT_RUN = 0;
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;// Enable SOCA from ePWM to start SEQ1
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)
//AdcRegs.ADCTRL2.bit.INT_MOD_SEQ1 = 0;
// Assumes ePWM1 clock is already enabled in InitSysCtrl();
EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount
EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
EPwm1Regs.CMPA.half.CMPA = 0x0080; // Set compare A value
EPwm1Regs.TBPRD = 375; // Set period for ePWM1
EPwm1Regs.TBCTL.bit.CTRMODE = 0; // count up and start
// Wait for ADC interrupt
for(;;)
{
}
}
interrupt void adc_isr(void)
{
Va = 310.638*(((AdcRegs.ADCRESULT0>>4)*3.0/4096)-1.65);
// Vas[i]=Va;
Vb = 310.638*(((AdcRegs.ADCRESULT1>>4)*3.0/4096)-1.65);
//Vbs[i] = Vb;
Vc = 310.638*(((AdcRegs.ADCRESULT2>>4)*3.0/4096)-1.65);
//Vcs[i] = Vc;
Vdc = (268.39*(AdcRegs.ADCRESULT7>>4)*3.0/4096)-3.2726;
Valpha = (Va-0.5*Vb-0.5*Vc)*sqrt(2.0/3);
Vbeta = (Vb*(sqrt(3.0)*0.5)-Vc*(sqrt(3.0)*0.5))*sqrt(2.0/3);
Ia = (15.011*(AdcRegs.ADCRESULT3>>4)*3.0/4096)-25.38+0.371+0.125;
//Ial[i] = Ia;
Ib = (14.708*(AdcRegs.ADCRESULT4>>4)*3.0/4096)-24.735+0.371+0.125;
//Ibl[i] = Ib;
Ic = (16.593*(AdcRegs.ADCRESULT5>>4)*3.0/4096)-28.003+0.371+0.140+0.155+0.31-0.09;
//Icl[i]=Ic;
Iaf = ((16.593*(AdcRegs.ADCRESULT6>>4)*3.0/4096)-28.003+0.371+0.140+0.155-0.1-0.03);
Iafarr[i]=Iaf;
Ibf = ((16.593*(AdcRegs.ADCRESULT9>>4)*3.0/4096)-28.003+0.371+0.140+0.155+0.03);
Ibfarr[i]=Ibf;
Icf = ((16.593*(AdcRegs.ADCRESULT8>>4)*3.0/4096)-28.003+0.371+0.140+0.155+0.67-0.64);
Icfarr[i]=Icf;
Ialpha = (Ia-0.5*Ib-0.5*Ic)*sqrt(2.0/3);
Ibeta = (Ib*(sqrt(3.0)*0.5)-Ic*(sqrt(3.0)*0.5))*sqrt(2.0/3);
p = (Valpha*Ialpha)+(Vbeta*Ibeta);
parray = p;
q = (Vbeta*Ialpha)-(Valpha*Ibeta);
wprev = p+(1.99985*wprev_1)-(0.9998596*wprev_2);
pfilt = wprev+wprev_2-(2.0*wprev_1);
wprev_2 = wprev_1;
wprev_1 = wprev;
//pc = p-pfilt;
err = (Vref*Vref)-(Vdc*Vdc);
ploss = ((kp+(ki*T)/2.0)*err)+(((ki*T/2)-kp)*err_prev)+ploss_prev;
err_prev=err;
ploss_prev=ploss;
Ialpc = ((Valpha*(ploss))+(Vbeta*(0)))*(1.0/((Valpha*Valpha)+(Vbeta*Vbeta)));
Ibetc = ((Vbeta*(ploss))+((-Valpha)*(0)))*(1.0/((Valpha*Valpha)+(Vbeta*Vbeta)));
//Iac = Ialpc*sqrt(2.0/3.0);
Iac = Va/40;
Iacarr[i]=Iac;
//Ibc = (Ialpc*(-0.5)+Ibetc*(sqrt(3.0)/2))*sqrt(2.0/3.0);
Ibc = Vb/40;
//Icc = (Ialpc*(-0.5)+Ibetc*(-sqrt(3.0)/2))*sqrt(2.0/3.0);
Icc = Vc/40;
//Ias[i] = Ia+Iac;
Ibs = Ib+Ibc;
Ics = Ic+Icc;
if(Iaf>=(Iac+hb))
{GpioDataRegs.GPACLEAR.bit.GPIO16=1;//g1
delay_loop();
GpioDataRegs.GPASET.bit.GPIO17=1;}
else if(Iaf<(Iac-hb))
{GpioDataRegs.GPACLEAR.bit.GPIO17=1;
delay_loop();
GpioDataRegs.GPASET.bit.GPIO16=1;}
else;
if(Ibf>=(Ibc+hb))
{GpioDataRegs.GPACLEAR.bit.GPIO18=1;//g1
delay_loop();
GpioDataRegs.GPASET.bit.GPIO19=1;}
else if(Ibf<(Ibc-hb))
{GpioDataRegs.GPACLEAR.bit.GPIO19=1;//g1
delay_loop();
GpioDataRegs.GPASET.bit.GPIO18=1;}
else;
if(Icf>=(Icc+hb))
{GpioDataRegs.GPACLEAR.bit.GPIO20=1; //g1
delay_loop();
GpioDataRegs.GPASET.bit.GPIO21=1;}
else if(Icf<(Icc-hb))
{GpioDataRegs.GPACLEAR.bit.GPIO21=1; //g1
delay_loop();
GpioDataRegs.GPASET.bit.GPIO20=1;}
else;
if(i == 499)
{
i = 0;
}
else
i++;
// Reinitialize for next ADC sequence
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE
return;
}
void GpioSelect(void)
{EALLOW;
GpioCtrlRegs.GPAMUX2.all = 0;
//GpioCtrlRegs.GPADIR.all = 0;
GpioCtrlRegs.GPADIR.bit.GPIO16 = 1;
GpioCtrlRegs.GPADIR.bit.GPIO17 = 1;
GpioCtrlRegs.GPADIR.bit.GPIO18 = 1;
GpioCtrlRegs.GPADIR.bit.GPIO19 = 1;
GpioCtrlRegs.GPADIR.bit.GPIO20 = 1;
GpioCtrlRegs.GPADIR.bit.GPIO21 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO16 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO17 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO18 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO19 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO20 = 1;
GpioCtrlRegs.GPAPUD.bit.GPIO21 = 1;
EDIS;
}
void delay_loop()
{
long d;
for (d = 0; d < 100; d++) {}
}
