• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 82 subscribers
  • Views 286 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Concerto F28M36x ARM Core ALIGN in CMD File

Sandeep Acharya
Intellectual 340 points
Other Parts Discussed in Thread: CONTROLSUITE

I see some issues without using the ALIGN(8) in Concerto ARM Cortex M3 code compilation. 

This ends up affecting my C28x code and i am trying to find a reason to this behaviour. 

I also note that in earlier versions of ControlSuite driverlib for F28M36x, this ALIGN(8) was not done. This is something new which has been added in v206 of F28M36x. 

Can anyone please explain why this is necessary now and how it affects code running on C28x. Is that due to the RAMFUNCS? 

Regards

Sandeep

  • 0
    TI__Guru* 87105 points
    Sandeep,

    When using AutoEccGeneration option in CCS Flash Plugin (or AutoEccGeneration option for Flash API program command) to program the Flash contents, AutoEccGeneration mode will program the supplied data portion in Flash along with automatically generated ECC. As you might know, 8-bits of ECC gets calculated for 64-bits of Flash that are aligned on a 64-bit boundary. AutoEccGeneration mode assumes the data that is not supplied with in a 64-bit slice as all 1s for generating the ECC. When the programming tool streams the output file of a code project and programs the individual sections one at a time into flash, if a 64-bit word spans more than one section (i.e., contains the end of one section, and the start of another section), values of all 1s cannot be assumed for the missing data in the 64-bit word when programming the first section. Reason is that when the tool starts to program the second section, it will not be able to program the ECC for the first 64-bit word since it was already (incorrectly) computed and programmed using assumed all 1s for the missing values. By aligning the sections (that are mapped to Flash) in the linker command file to a 64-bit boundary, you are making sure that every section starts on a 64-bit aligned memory address. If you do not align the sections, tool would need to track incomplete 64-bit words in a section and combine with the words in other sections that complete the 64-bit word. This will impact the performance of the tool and hence it is recommended to align your sections on 64-bit boundaries. This alignment is required in both M3 and C28x linker command files.

    Can you explain more on what you observed with your C28x code execution?
    Did you notice any ECC error on M3 or C28x? An uncorrectable error on M3 will cause a bus-fault and a uncorrectable error on C28x will cause an NMI.

    Are you using the CCS Flash Plugin to load the code to Flash?

    Thanks and regards,
    Vamsi