TMS320F28335 limp mode and GPIO configuration

Ramon,

You can configure and manipulate the GPIO pins in limp mode. Limp mode is really a mode of the PLL. The rest of the processor is operating as normal, albeit with a slow clock.

You said you will be doing this before InitSysCtrl.  Make sure you enable the clock to the GPIO module before you start manipulating the GPIO registers:

   SysCtrlRegs.PCLKCR3.bit.GPIOINENCLK = 1; // GPIO input module is clocked

Regards,
David

Hi David,

thanks for the advice of enable the clock for GPIO module.

My problem is that I would like to make a sequence by alternating two GPIOs if the PLL is in limp mode. I need to calculate an approximate time to define the sequence.  As I'm not able to execute this in real LIMP mode, I execute this sequence when PLLSTS[MCLKSTS] = 0 (always), so now SYSCLCKOUT = 150 MHz. Then, I would assimilate the time to 1-5MHz of limp mode frequency.

However,  the problem I'm encountering is that now this time is different if I'm executing in real-time mode JTAG debugging or  in stand-alone mode. How can I control this time to be always the same? What am I missing?

Thank you!

void main(void)
{		
  	//Check if device is operating in limp mode, wrong clock frequency (H.2.18.10.1 Frequency monitoring)
	//====================================================================================================== 
 //	if(STL_CLOCK_FAIL_DETECT_checkMissingClock() == 1U )  // returns SysCtrlRegs.PLLSTS.bit.MCLKSTS
 	if(STL_CLOCK_FAIL_DETECT_checkMissingClock() == 0U )  // returns SysCtrlRegs.PLLSTS.bit.MCLKSTS
	{
		// Crec que ja no es resetejaria el DSP, només ho fa un cop a no sé que esborrem escrivint 1 a PLLSTS[MCLKCLR].
		// El problema és que no val anar a a alarma i permetre ressetejar-ne alguna...ja que no tornaria a mirar el clock
		// S'hauria de resetejar DSP (però per watchdog no serveix): However, when the external input clock fails,
		// the watchdog counter stops decrementing (that is, the watchdog counter does not change with the limp-mode clock).
		 
		EALLOW;
	   SysCtrlRegs.PCLKCR3.bit.GPIOINENCLK = 1; // GPIO input module is clocked (enable clock to the GPIO module)

		GpioCtrlRegs.GPBMUX1.bit.GPIO43 = 0;   		// Configured as GPIO			LED 39
		GpioCtrlRegs.GPBDIR.bit.GPIO43  = 1;  		// Configured as output	
		GpioCtrlRegs.GPBMUX1.bit.GPIO44 = 0;  	 	// Configured as GPIO			LED 38	
		GpioCtrlRegs.GPBDIR.bit.GPIO44  = 1;  		// Configured as output
		GpioCtrlRegs.GPCMUX1.bit.GPIO73	= 0;		// Configured as GPIO			RE10 	
		GpioCtrlRegs.GPCDIR.bit.GPIO73 	= 1;		// Configured as output
		GpioCtrlRegs.GPCPUD.bit.GPIO73	= 1; 		// Disable internal pull-up		
		GpioCtrlRegs.GPCMUX1.bit.GPIO74	= 0;		// Configured as GPIO			RE11   (close contact bi-stable)
		GpioCtrlRegs.GPCDIR.bit.GPIO74	= 1; 		// Configured as output 
		GpioCtrlRegs.GPCPUD.bit.GPIO74	= 1; 		// Disable internal pull-up
		GpioCtrlRegs.GPCMUX1.bit.GPIO75	= 0;		// Configured as GPIO			RE12 	(open contact bi-stable)
		GpioCtrlRegs.GPCDIR.bit.GPIO75	= 1;		// Configured as output
		GpioCtrlRegs.GPCPUD.bit.GPIO75	= 1; 		// Disable internal pull-up
		EDIS;
		
		GpioDataRegs.GPBSET.bit.GPIO43=1;	
		GpioDataRegs.GPBCLEAR.bit.GPIO44=1;
		for(iClock=0; iClock<500 ;iClock++)
		{
		}
		GpioDataRegs.GPBCLEAR.bit.GPIO43=1;	
		GpioDataRegs.GPBSET.bit.GPIO44=1;
		for(iClock=0; iClock<500 ;iClock++)
		{
		} 
		GpioDataRegs.GPBSET.bit.GPIO43=1;	
		GpioDataRegs.GPBCLEAR.bit.GPIO44=1;
		for(iClock=0; iClock<500 ;iClock++)
		{
		} 
		GpioDataRegs.GPBCLEAR.bit.GPIO43=1;	
		GpioDataRegs.GPBSET.bit.GPIO44=1;	
		GpioDataRegs.GPCCLEAR.bit.GPIO73	=1;		// Open Relay 10 to shut-down power supply 
		GpioDataRegs.GPCSET.bit.GPIO74		=1;	 	// Close Relay 11 to open biestable relay
		GpioDataRegs.GPCCLEAR.bit.GPIO75	=1;		// Open Relay 12  to open biestable relay
	
		for(iClock=0; iClock<5000 ;iClock++)
		{
		}
	
		asm("      ESTOP0");						// It stops emulation mode	
	} 


	//  System Initialization (@TODO TREURE HALT
	//========================================================================================================
	InitSysCtrl(); 	// This function initializes the System Control registers to a known state.
					// This funcion ensures that the PLL finishes to lock at the desired frequency and that PLL is stable.

  	

Ramon,

I can offer a theory on what may be happening, but I cannot be certain of course.  In the code you showed, you are executing your GPIO sequence as the first thing in main.  You then have an ESTOP instruction which will halt if the emulator is connected.  Otherwise, the ESTOP acts like a NOP and the code will continue.  If the code continues, you execute InitSysCtrl() which locks the PLL.

Now, once the PLL is configured and locked, I recall that a debugger reset does NOT reset it (a hard reset does, say a WD reset or XRSn pin reset, but doing a Run->Reset in Code Composer does not reset the PLL.  The PLL stays locked).  So, once InitSysCtrl() is executed with the debugger connected, the SYSCLKOUT will stay at 150 MHz until you have a hard reset.  Maybe this is what is going on?  You reset in CCS and execute again, but your GPIO sequence behaves as if the SYSCLKOUT was at 150 MHz.  In standalone mode, you are always doing a hard reset so the GPIO sequence operates with SYSCLKOUT of 15 MHz (I assume a 30 MHz CLKIN, and I think the default clock settings are SYSCLKOUT = CLKIN/2).

You could test this theory by commenting out the PLL lock in InitSysCtrl().  Then, standalone mode and debugger mode should behave exactly the same.

Regards,

David