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McBSP Slave mode cycle time [Device : F28377D]

I want to know "cycle time" of McBSP Slave mode.

Is tc(CKX)[min] correct in the following calcultion?

tc(CKX) = 16P 
= 8 * 1/CLKG
= 8 * 1/25MHz
= 320nsec

I'm cofused regarding following discription.

Best regards,

Mino.M

  • Hi Mino,

    Is tc(CKX)[min] correct in the following calcultion?

    tc(CKX) = 16P 
    = 8 * 1/CLKG
    = 8 * 1/25MHz
    = 320nsec

    Yes, this is correct (assuming you have configured McBSP to generate 25MHz CLKG). If you configure the McBSP to generate CLKG with higher frq then this value will change.

    In McBSP, SPI clock frq in slave mode need to be 1/8 of CLKG and CLKG should be 1/2 of LSPCLK. Which basically means max frq for SPI CLK in slave mode cannot be more than 1/16 of LSPCLK. Same thing when translated into time, minimum cycle time for SPI CLK in slave mode is 16 * LSPCLK period.

    Regards,

    Vivek Singh

  • Hi Vivek.

    Thank you for your reply.

    Vivek Singh said:

    If you configure the McBSP to generate CLKG with higher frq then this value will change.

    Can I generate the CLKG higher than 25MHz ?

    Thanks and regards,

    Mino.M

  • Hi Mino,

    Yes, you should be able to generate CLKG with higher frq in SLAVE mode if using the LSPCLK as source for CLKG (as given in note in datasheet).

    I understand the confusion because of the table you are referring. I think it's applicable for some specific mode. I'll check on this and see if we could add some note in document for clarification.

    Regards,

    Vivek Singh

  • Hi Mino,

    Is there any specific reason for using the SPI mode of McBSP module and not actual SPI module itself ? 

    Regards,

    Vivek Singh

  • Hi Vivek,

    Sorry. I don't know.
    I'll confirm that detail with my customer.

    Best regards,

    Mino.M