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about 28069 on peak current control mode

F28069 how to use the internal comparator analog peak current control model? how to configure register ?I configure those as follow:

EALLOW;
EPwm1Regs.TZSEL.bit.DCAEVT2=1;
EPwm1Regs.TZCTL.bit.DCAEVT2=2;//force low
EPwm1Regs.TZDCSEL.bit.DCAEVT2=4;
EPwm1Regs.DCTRIPSEL.bit.DCAHCOMPSEL=0;
EPwm1Regs.DCTRIPSEL.bit.DCALCOMPSEL=8;
EPwm1Regs.DCACTL.bit.EVT2SRCSEL=1;
EPwm1Regs.DCACTL.bit.EVT2FRCSYNCSEL=1;
EPwm1Regs.DCFCTL.bit.PULSESEL=1;
EPwm1Regs.DCFCTL.bit.BLANKINV=0;
EPwm1Regs.DCFCTL.bit.BLANKE=1;
EPwm1Regs.DCFCTL.bit.SRCSEL=1;
EPwm1Regs.DCFWINDOW=10;
EDIS;

EALLOW;
Comp1Regs.COMPCTL.bit.COMPSOURCE=0;
Comp1Regs.COMPCTL.bit.COMPDACEN=1;
Comp1Regs.DACVAL.bit.DACVAL=310;
EDIS;

  • Hi,

    You'll need to spend some time debugging and looking into the chip documentation to get what you want working.

    Based on experience, I will recommend a few things which should help you debug:
    1) Divide the problem in two.  The output status of all comparators go to registers.  By putting a controlled analog signal into the comparator input, and modifying the voltage around the trip-point, you should be able to tell if your comparator setup is correct or incorrect. 
    2) Figure 3-39 (Trip-Zone Submodule Mode Control Logic) of the current F28069 TRM (spruh18e) will be extremely useful for setting up the ePWM trip-zone submodule.  Note that CBC trip events and OSHT trip events are both seen as TZA or TZB events in the "Trip Logic" block (not DCxEVTn events).  If using CBC events, you should be setting the TZCTL[TZA] or TZCTL[TZB] register bits and not the TZCTL[DCxEVTn] register bits.


    Thank you,
    Brett