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IER Register modification

Hi,

In the "TMS320x2833x, 2823x System Control and Interrupts" Manual (sprufb0d) it is written that the IER register should be modified with AND and OR instructions. In the online article "Interrupt Nesting on C28x" from TI (processors.wiki.ti.com/.../Interrupt_Nesting_on_C28x) the example does the following:

    IER |= 0x002;                         // Set global priority by adjusting IER
    IER &= 0x002;

This complies to the manual but I do not understand why one can not write this as follows:

    IER=0x002;

Any special reasons within the CPU why we can not directly write a constant value?

Thanks and best regards,

Patrick

  • What will happens if you set multiple interrupts? the microcontroller will only accept the last one you entered. Thats why is ORed or ANDed in this cases.
    Gastón
  • Gastón,

    The whole context is as follows:

    interrupt void EPWM1_TZINT_ISR(void)
    {
        uint16_t TempPIEIER;
        TempPIEIER = PieCtrlRegs.PIEIER2.all; // Save PIEIER register for later
        IER |= 0x002;                         // Set global priority by adjusting IER
        IER &= 0x002;
        PieCtrlRegs.PIEIER2.all &= 0x0002;    // Set group priority by adjusting PIEIER2 to allow INT2.2 to interrupt current ISR
        PieCtrlRegs.PIEACK.all = 0xFFFF;      // Enable PIE interrupts
        asm("       NOP");                    // Wait one cycle
        EINT;                                 // Clear INTM to enable interrupts
    ...

    In this example only Interrupt Group 2 is enabled for nested interrupts. So for me the result of the two lines for setting IER results in:

    IER=0x002;

    I understand your point if only an OR operation is done or only an AND operation. But both operation with the same value?

  • Can anyone from TI please clarify the question?

    Gastón, that exacly is the link I have added in my first post. I know this link and the code is from there.
  • as state in the wiki:

    Adding Simple Software Prioritization (Nesting)
    Therefore, the steps required to nest interrupts are:
    Step 1: Set the global priority:
    Modify the IER register to allow CPU interrupts with a higher user priority to be serviced.
    Note: at this time IER has already been saved on the stack.
    Step 2: Set the group priority: (optional)
    Modify the appropriate PIEIERx register to allow group interrupts with a higher user set priority to be serviced.
    Do NOT clear PIEIER register bits from another group other than that being serviced by this ISR. Doing so can cause erroneous interrupts to occur.
    Step 3: Enable interrupts:
    There are three steps to do this:
    Clear the PIEACK bits
    Wait at least one cycle
    Clear the INTM bit. Use the assembly statement asm(" CLRC INTM"); or TI examples use #define EINT asm(" CLRC INTM")
    Step 4: Run the main part of the ISR
    Step 5: Set INTM to disable interrupts. Use asm(" SETC INTM"); or TI examples use #define DINT asm(" SETC INTM")
    Step 6: Restore PIEIERx (optional depending on step 2)
    Step 7: Return from ISR
    This will restore INTM and IER automatically.

    what do you not understand?
    in the ISR you have to re-enable the interrupt for the group again. IER |= 0x002;

    check this post :
    e2e.ti.com/.../47503
    e2e.ti.com/.../349801

    Gastón
  • Hi,

    Operand is not an immediate value incase of MOV instruction for IER.

    So if you use "IER = 0x002;" it'll first move the operand to accumulator and then move that value back into the IER register which may not be as efficient (cycle) as using the OR and AND operation which supports immediate value as operand.

    Hope this helps.

    Regards,

    Vivek Singh

     

     

     

  • Vivek,

    Thanks for your explanation. Now I understand.

    Best regards,
    Patrick

  • Vivek I had the same question and thanks to your answer I understand why normal assigement ("=") is not used, but why is both OR and AND used, surely one or the other is sufficient?

    Maybe the example is simply indicating that either operation could be used?

  • Hi Toby,

    OR operation is setting the bit for the interrupt which need to be enabled and AND operation is to clear the enable bits for other interrupts so that only required interrupt is serviced as part of the nesting operation. IER value is saved earlier in ISR and then it's restored before exiting the ISR.

    Regards,

    Vivek Singh 

  • Thanks Vivek :)
  • "OR operation is setting the bit for the interrupt which need to be enabled and AND operation is to clear the enable bits for other interrupts so that only required interrupt is serviced as part of the nesting operation. "

    This indeed should be added to the wiki article.

  • Thanks for your suggestion. We'll try to include this as part of comment in the code in wiki article.

    Regards,

    Vivek Singh