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SPI Mode1 in Tms320F2812

Other Parts Discussed in Thread: TMS320F2812

Hi iam using Tms320f2812  processor, i have configured my spi slave in (( Data is output one half-cycle before the first rising edge of the SPICLK signal and on subsequent falling edges of the SPICLK signal; input data is latched on the rising edge of the SPICLK signal.)).

I have attached one file  in dat iam sending data 0xE4 and it is transmitting correctly .instead of sending data with half bit before clk why extra high pulse is sending??? 

Yellow:-SPICLK

Green:-MOSI

SpiaRegs.SPICCR.all =0x0007; // Reset on, rising edge, 8-bit char bits
SpiaRegs.SPICTL.all =0x000E; // Enable master mode, normal phase, // enable talk, and SPI int disabled.
SpiaRegs.SPIBRR =0x0025; //0x001F;
SpiaRegs.SPICCR.all =0x0087; // Relinquish SPI from Reset
SpiaRegs.SPIPRI.bit.FREE = 1;

Please tell me why it is sending like that.