Other Parts Discussed in Thread: CONTROLSUITE, DAC7554
Hi,
My goal is to drive AD9850 via F28335 and spi. I am using SPICLKA as AD9850's W CLK. According to the AD9850 datasheet, after resetting AD9850, i need to send a pulse to the W CLK. At that moment SIMO is at logic LOW.
Based on example C:\ti\controlSUITE\device_support\f2833x\v140\DSP2833x_examples_ccsv5\spi_loopback , this is what i do,
void spi_init()
{
SpiaRegs.SPICCR.all =0x0017; // Reset on, rising edge, 8-bit char bits,loopback
SpiaRegs.SPICTL.all =0x0006; // Enable master mode, normal phase,
// enable talk, and SPI int disabled.
SpiaRegs.SPIBRR =0x007F; // Baud rate
SpiaRegs.SPIFFTX.all=0xC040; // Enable FIFO's, set TX FIFO level to 0
SpiaRegs.SPIFFRX.all=0x005F; // Set RX FIFO level to (default)32
SpiaRegs.SPIFFCT.all=0x00; // no FIFO transmit delay
SpiaRegs.SPIPRI.bit.FREE = 1; // Set so breakpoints don't disturb xmission
SpiaRegs.SPICCR.bit.SPISWRESET=1; // Enable SPI
SpiaRegs.SPIFFTX.bit.TXFIFO=1;
SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;
}
void AD9850_reset(void)
{
AD9850_Reset = 0;
delay_loop();
AD9850_Reset = 1;
delay_loop();
AD9850_Reset = 0;
SpiaRegs.SPICCR.bit.CLKPOLARITY=0; // SPI clock 0
delay_loop();
SpiaRegs.SPICCR.bit.CLKPOLARITY=1; // SPI clock 1
delay_loop();
SpiaRegs.SPICCR.bit.CLKPOLARITY=0; // SPI clock 0
FQ_UD = 0;
delay_loop();
FQ_UD = 1;
delay_loop();
FQ_UD = 0;
}
Is this a proper way, sending a pulse via changing SPI clock polarity? Is there an other solution?
Thank you
